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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
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Coreboot firmware sources
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path:
root
/
src
/
soc
/
intel
/
baytrail
/
ehci.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
src: Make PCI ID define names shorter
Felix Singer
2022-03-07
1
-1
/
+1
*
soc/intel/baytrail: Rename "pmc.h" to "pm.h"
Angel Pons
2020-07-09
1
-1
/
+1
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-02
1
-1
/
+1
*
soc/intel/baytrail: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-13
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-1
/
+0
*
soc/intel: Use config_of()
Kyösti Mälkki
2019-07-18
1
-2
/
+2
*
src: Remove unneeded include <console/console.h>
Elyes HAOUAS
2018-11-16
1
-1
/
+0
*
soc/intel/baytrail: Get rid of device_t
Elyes HAOUAS
2018-05-24
1
-2
/
+2
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-1
/
+1
*
baytrail: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-04-07
1
-6
/
+6
*
baytrail: there is a chance that USBPHY_COMPBG is set to 0
Kane Chen
2015-01-16
1
-1
/
+3
*
baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG
Kane Chen
2015-01-16
1
-1
/
+2
*
intel boards: Use acpi_is_wakeup_s3()
Kyösti Mälkki
2014-06-21
1
-1
/
+1
*
baytrail: utilize reg_script_run_on_dev()
Aaron Durbin
2014-05-10
1
-17
/
+11
*
baytrail: Add EHCI initialization
Duncan Laurie
2014-03-11
1
-0
/
+184