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path: root/src/soc/intel/baytrail/include/soc/romstage.h
Commit message (Expand)AuthorAgeFilesLines
* src: Remove unused 'include <stdint.h>Elyes HAOUAS2020-07-141-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/baytrail: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* src: Remove unused 'include <arch/cpu.h>'Elyes HAOUAS2019-12-191-1/+0
* soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-11-291-2/+0
* soc/intel: Remove some __PRE_RAM__ useKyösti Mälkki2019-09-131-4/+0
* google/rambi,intel/baytrail: Simplified romstage flowKyösti Mälkki2019-08-281-6/+1
* arch/x86: Rename some mainboard_romstage_entry()Kyösti Mälkki2019-08-211-1/+1
* intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki2019-08-211-6/+0
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-1/+0
* sb/intel/*: Delete early_spiPatrick Rudolph2019-05-291-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki2019-01-081-2/+1
* soc/intel: Drop romstage_after_car()Kyösti Mälkki2018-12-281-1/+0
* src/soc: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS2018-07-091-1/+1
* soc/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth2017-07-131-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner2015-04-071-0/+54
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