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coreboot.git
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4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
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4.16_branch
4.18_branch
4.19_branch
4.2
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4.22_branch
4.3
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path:
root
/
src
/
soc
/
intel
/
baytrail
/
xhci.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
src: Make PCI ID define names shorter
Felix Singer
2022-03-07
1
-1
/
+1
*
soc/intel/baytrail: Rename "pmc.h" to "pm.h"
Angel Pons
2020-07-09
1
-1
/
+1
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-02
1
-1
/
+1
*
soc/intel/baytrail: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-13
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-1
/
+0
*
soc/intel: Use config_of()
Kyösti Mälkki
2019-07-18
1
-1
/
+1
*
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-03-01
1
-0
/
+1
*
soc/intel/baytrail: Get rid of device_t
Elyes HAOUAS
2018-05-24
1
-3
/
+3
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-1
/
+1
*
baytrail: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-04-07
1
-8
/
+8
*
baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU
Kein Yuan
2015-04-02
1
-0
/
+9
*
ACPI: Get S3 resume state from romstage_handoff
Kyösti Mälkki
2015-03-10
1
-2
/
+2
*
rambi/baytrail: ACPI, GPIO, audio, misc updates
Shawn Nematbakhsh
2014-09-18
1
-9
/
+33
*
baytrail: utilize reg_script_run_on_dev()
Aaron Durbin
2014-05-10
1
-7
/
+4
*
baytrail: Fix XHCI problems and re-enable
Duncan Laurie
2014-04-30
1
-4
/
+7
*
baytrail: Add XHCI initialization
Duncan Laurie
2014-03-11
1
-0
/
+226