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path: root/src/soc/intel/baytrail
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* soc/intel: Update license headersMartin Roth2016-04-146-0/+83
* x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin2016-03-081-2/+1
* tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli2016-02-261-1/+1
* ACPI: Fix IASL Warning about unused method for GBUF checkMartin Roth2015-12-101-1/+1
* lib: remove assets infrastructureAaron Durbin2015-12-101-1/+1
* baytrail: fix missing brackets around ir_base to fix IRQ routingAlexander Couzens2015-11-281-1/+1
* intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS methodMartin Roth2015-11-241-116/+117
* baytrail: add C0 and D0 stepping decodeBen Gardner2015-11-212-2/+8
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-3178-312/+0
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-154-25/+25
* Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth2015-10-051-0/+1
* cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc2015-09-303-5/+2
* intel: auto include intel/common/firmwareAaron Durbin2015-09-291-1/+0
* coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin2015-09-241-2/+0
* chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski2015-09-231-3/+1
* x86: bootblock: remove linking and program flow from build systemAaron Durbin2015-09-093-2/+4
* Drop "See file CREDITS..." commentStefan Reinauer2015-09-071-3/+0
* bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin2015-09-041-2/+0
* x86: remove cpu_incs as romstage Make variableAaron Durbin2015-09-041-2/+2
* x86: Drop -Wa,--divideStefan Reinauer2015-07-071-2/+2
* Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth2015-07-022-93/+2
* Kconfig: Get rid of obsolete symbolsMartin Roth2015-06-241-1/+0
* Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth2015-06-231-12/+0
* stage_cache: use cbmem init hooksAaron Durbin2015-06-091-11/+6
* cbmem: add indicator to hooks if cbmem is being recoveredAaron Durbin2015-06-091-1/+1
* cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() APIKyösti Mälkki2015-06-091-1/+1
* Remove empty lines at end of fileElyes HAOUAS2015-06-081-1/+0
* device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens2015-06-051-1/+1
* device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens2015-06-051-1/+1
* devicetree: Change scan_bus() prototype in device opsKyösti Mälkki2015-06-041-2/+2
* devicetree: Discriminate device ops scan_bus()Kyösti Mälkki2015-06-041-1/+1
* assets: abstract away the firmware assets used for bootingAaron Durbin2015-06-021-4/+2
* cbfs: new API and better program loadingAaron Durbin2015-06-022-58/+12
* chromeos: always enable timestampsStefan Reinauer2015-05-291-1/+0
* smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko2015-05-281-1/+0
* Move TPM code out of chromeosVladimir Serbinenko2015-05-271-9/+4
* acpi: Remove monolithic ACPIVladimir Serbinenko2015-05-261-1/+0
* baytrail: Switch to per-device ACPIVladimir Serbinenko2015-05-236-32/+58
* Remove address from GPLv2 headersPatrick Georgi2015-05-2178-93/+78
* baytrail: broadwell: correct refcode loadingAaron Durbin2015-05-131-1/+1
* 3rdparty: move to 3rdparty/blobsPatrick Georgi2015-05-052-5/+5
* 3rdparty: Move to blobsPatrick Georgi2015-05-052-5/+5
* intel: Correct MMIO related ACPI table settingsDave Frodin2015-05-011-3/+4
* kbuild: Don't require intel/common changes for every socStefan Reinauer2015-04-301-0/+1
* kbuild: automatically include SOCsStefan Reinauer2015-04-291-1/+4
* coreboot: common stage cacheAaron Durbin2015-04-224-64/+22
* soc/baytrail: Use microcode from the blobs repositoryMarc Jones2015-04-153-16322/+1
* baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen2015-04-101-1/+1
* baytrail: add code for supporting 2x ddr refresh rateKane Chen2015-04-102-0/+14
* baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee2015-04-101-1/+1
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