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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
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4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
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path:
root
/
src
/
soc
/
intel
/
braswell
/
acpi
/
lpc.asl
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
soc/intel/braswell: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-14
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-3
/
+0
*
sb/intel: Use defined CONFIG_HPET_ADDRESS
Elyes HAOUAS
2019-11-04
1
-1
/
+1
*
soc/intel/braswell/acpi/lpc.asl: Allocate used ROM size only
Frans Hendriks
2019-07-10
1
-3
/
+13
*
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-08
1
-1
/
+1
*
src/soc/intel/braswell/acpi/lpc.asl: Add ACPI and GPIO bases
Frans Hendriks
2018-11-28
1
-0
/
+4
*
soc/intel/braswell: Disable OS use of HPET
Frans Hendriks
2018-11-21
1
-0
/
+3
*
soc/intel: Remove legacy static TPM asl code
Philipp Deppenwiese
2018-07-29
1
-23
/
+0
*
acpi/tpm: remove non-existent IRQ for Infineon TPM chip
Matt DeVillier
2017-11-30
1
-1
/
+0
*
acpi/tpm: update TPM preprocessor guards
Matt DeVillier
2017-11-30
1
-1
/
+1
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Braswell: Add Braswell SOC support
Lee Leahy
2015-06-25
1
-20
/
+22
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-28
1
-2
/
+1
*
Braswell: Use Baytrail as Comparison Base
Lee Leahy
2015-05-23
1
-0
/
+167