| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | soc/intel/braswell: Use SPDX for GPL-2.0-only files | Angel Pons | 2020-04-06 | 1 | -13/+2 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -3/+0 |
| * | soc/intel/braswell: Correct serial IRQ support | Frans Hendriks | 2019-04-04 | 1 | -0/+4 |
| * | soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support | Frans Hendriks | 2018-09-21 | 1 | -1/+4 |
| * | soc/intel/braswell: Put SERIRQ in quiet mode | Hannah Williams | 2017-08-25 | 1 | -0/+3 |
| * | tree: drop last paragraph of GPL copyright header | Patrick Georgi | 2015-10-31 | 1 | -4/+0 |
| * | Braswell: Add Braswell SOC support | Lee Leahy | 2015-06-25 | 1 | -4/+5 |
| * | Remove address from GPLv2 headers | Patrick Georgi | 2015-05-28 | 1 | -1/+1 |
| * | Braswell: Use Baytrail as Comparison Base | Lee Leahy | 2015-05-23 | 1 | -0/+54 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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