index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
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diff
stats
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path:
root
/
src
/
soc
/
intel
/
braswell
/
include
/
soc
/
ramstage.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/braswell: use mp_cpu_bus_init
Felix Held
2021-10-22
1
-1
/
+0
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
soc/intel/braswell: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-13
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-2
/
+0
*
intel/braswell: Remove duplicate set_max_freq() prototypes
Kyösti Mälkki
2019-11-08
1
-1
/
+0
*
soc/{amd,intel}/chip: Use local include for chip.h
Elyes HAOUAS
2019-04-26
1
-1
/
+2
*
soc/intel/braswell: Get rid of device_t
Elyes HAOUAS
2018-06-04
1
-3
/
+3
*
soc/intel/braswell: Add USB2 phy setting override
Matt DeVillier
2017-09-08
1
-0
/
+1
*
soc/intel/braswell: Add SoC stepping identify helper
Matt DeVillier
2017-09-08
1
-0
/
+71
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
FSP 1.1: Move common FSP code
Lee Leahy
2015-10-27
1
-1
/
+1
*
Braswell: Add Braswell SOC support
Lee Leahy
2015-06-25
1
-14
/
+12
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-28
1
-1
/
+1
*
Braswell: Use Baytrail as Comparison Base
Lee Leahy
2015-05-23
1
-0
/
+42