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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
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Coreboot firmware sources
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path:
root
/
src
/
soc
/
intel
/
braswell
/
include
/
soc
/
romstage.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
soc/intel/braswell: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-13
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-2
/
+0
*
intel/braswell: Remove duplicate set_max_freq() prototypes
Kyösti Mälkki
2019-11-08
1
-1
/
+0
*
{drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
Frans Hendriks
2019-06-12
1
-3
/
+1
*
sb/intel/*: Delete early_spi
Patrick Rudolph
2019-05-29
1
-1
/
+0
*
intel/fsp1_1: Drop remnants of `pei_data`
Nico Huber
2019-05-07
1
-2
/
+0
*
soc/intel/bsw: Move memory init values into `romstage.h`
Nico Huber
2019-05-07
1
-0
/
+4
*
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-11-12
1
-1
/
+0
*
drivers/intel/fsp1_1: Remove extra include references
Lee Leahy
2016-01-28
1
-2
/
+1
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
FSP 1.1: Move common FSP code
Lee Leahy
2015-10-27
1
-1
/
+1
*
soc/intel/common: remove chipset specific calls
Aaron Durbin
2015-10-11
1
-0
/
+1
*
fsp1_1: provide binding to UEFI version
Aaron Durbin
2015-09-10
1
-1
/
+1
*
Braswell: Add Braswell SOC support
Lee Leahy
2015-06-25
1
-25
/
+13
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-28
1
-1
/
+1
*
Braswell: Use Baytrail as Comparison Base
Lee Leahy
2015-05-23
1
-0
/
+54