summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/braswell/smihandler.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/braswell: Use {read,write}32p()Elyes Haouas2024-01-181-15/+15
* soc/intel: Clean up some includesKyösti Mälkki2023-05-101-1/+1
* soc/intel/braswell: Use common gpio.h includeDinesh Gehlot2023-01-181-3/+3
* mb,sb,soc/intel: Drop useless IO trap handlersKyösti Mälkki2022-12-071-18/+0
* sb,soc/intel: Remove no-op APMC for C-state and P-stateKyösti Mälkki2021-01-251-14/+0
* cpu/x86/smm: Use common APMC loggingKyösti Mälkki2021-01-251-7/+1
* arch/x86: Pass GNVS as parameter to SMM moduleKyösti Mälkki2021-01-041-20/+0
* src/soc/intel: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* SMM: Validate more user-provided pointersPatrick Rudolph2020-08-211-0/+4
* ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki2020-07-011-7/+0
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-3/+3
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-4/+4
* soc/intel/braswell: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc/intel/braswell: Clean upAngel Pons2020-03-231-54/+29
* soc: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* soc/braswell: hook up smmstoreMatt DeVillier2020-03-031-0/+25
* src/soc/intel: Remove unused <stdlib.h>Elyes HAOUAS2019-12-191-1/+0
* soc/intel/braswell: Don't reinitialize SPI after lockdownArthur Heymans2019-11-291-19/+0
* ELOG: Introduce elog_gsmi variantsKyösti Mälkki2019-11-091-11/+5
* cpu/x86: Separate save_state struct headersKyösti Mälkki2019-08-131-0/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-5/+5
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-0/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* elog: make elog's SMM handler code follow everything elsePatrick Georgi2018-12-051-2/+2
* src: Use of device_t is deprecatedElyes HAOUAS2018-06-141-1/+1
* soc/intel/braswell: use common Intel ACPI hardware definitionsAaron Durbin2016-07-151-11/+11
* soc/braswell: Fix leakage on V1P8S railShobhit Srivastava2016-01-271-0/+2
* Correct some common spelling mistakesMartin Roth2016-01-071-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi2015-09-081-0/+6
* Braswell: Add Braswell SOC supportLee Leahy2015-06-251-119/+108
* Remove address from GPLv2 headersPatrick Georgi2015-05-281-1/+1
* Braswell: Use Baytrail as Comparison BaseLee Leahy2015-05-231-0/+483
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-28 22:15:52 +0000