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path: root/src/soc/intel/broadwell/romstage
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* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+0
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-1/+1
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-6/+0
* cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki2019-08-151-12/+4
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-5/+1
* soc/intel: Replace uses of dev_find_slot()Kyösti Mälkki2019-07-041-1/+1
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-3/+2
* src/soc/intel: Avoid NULL pointer dereferenceJohn Zhao2019-06-031-0/+6
* sb/intel/*: Delete early_spiPatrick Rudolph2019-05-292-144/+0
* Clean up unused arch/early_variables.h headerArthur Heymans2019-05-292-2/+0
* soc/intel/broadwell: Enable LPC/SIO setup in bootblockArthur Heymans2019-05-152-50/+0
* nb/intel/broadwell: Add an option for where verstage startsArthur Heymans2019-05-151-1/+6
* soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-05-152-5/+1
* soc/intel/broadwell: Use the common cpu/intel/car romstage entryArthur Heymans2019-05-152-19/+5
* soc/intel/broadwell: Clean up the bootflowArthur Heymans2019-05-141-24/+21
* soc/intel/broadwell: Don't use a pointer for pei_dataArthur Heymans2019-05-141-3/+2
* soc/intel/broadwell: Move GPIO init to a common placeArthur Heymans2019-05-141-0/+4
* src: Use include <delay.h> when appropriateElyes HAOUAS2019-04-061-1/+0
* Move calls to quick_ram_check() before CBMEM initKyösti Mälkki2019-03-271-4/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-083-5/+5
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-047-7/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-013-0/+3
* soc/intel/broadwell: Don't use CAR_GLOBALArthur Heymans2019-02-131-4/+3
* postcar: Make more use of postcar_frame_add_romcache()Nico Huber2019-02-121-2/+1
* cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki2019-01-081-4/+10
* soc/intel: Drop romstage_after_car()Kyösti Mälkki2018-12-281-8/+0
* soc: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-192-2/+0
* cpuid: Add helper function for cpuid(1) functionsSubrata Banik2018-12-131-7/+8
* soc/intel/broadwell: Implement postcar stageArthur Heymans2018-12-054-425/+35
* src: Remove unneeded include <cbmem.h>Elyes HAOUAS2018-11-161-1/+0
* src: Remove unneeded include <cbfs.h>Elyes HAOUAS2018-11-161-1/+0
* src: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-163-3/+0
* src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS2018-11-121-1/+0
* intel: Use CF9 reset (part 1)Patrick Rudolph2018-10-222-4/+3
* src: Replace MSR addresses with macrosElyes HAOUAS2018-10-111-2/+2
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* cpu/*/car: fix ancient URL explaining XIP range run-time calculationStefan Tauner2018-09-181-1/+1
* drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese2018-07-251-4/+0
* x86/car: Replace reference of copy_and_run locationKyösti Mälkki2018-06-271-1/+1
* src: Get rid of device_tElyes HAOUAS2018-06-141-1/+5
* security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese2018-06-041-4/+3
* soc/intel/broadwell: decouple PEI memory struct from coreboot headerMatt DeVillier2018-05-311-2/+26
* src: Fix a typo on "mtrr"Elyes HAOUAS2018-04-262-3/+3
* compiler.h: add __weak macroAaron Durbin2018-04-241-1/+2
* pci: Move inline PCI functions to pci_ops.hPatrick Rudolph2018-04-201-0/+1
* Correct "MTTR" to "MTRR"Jonathan Neuschäfer2018-04-111-10/+10
* soc/intel/broadwell: Enable VT-d and X2APICMatt DeVillier2018-03-011-0/+21
* security/tpm: Change TPM naming for different layers.Philipp Deppenwiese2018-01-181-1/+1
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