summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/cannonlake/Kconfig
Commit message (Expand)AuthorAgeFilesLines
* Untangle CBFS microcode updatesNico Huber2019-01-101-0/+1
* soc/intel: Clean mess around UART_DEBUGNico Huber2019-01-091-17/+0
* soc/intel/cannonlake: Fix I2C clock inputDuncan Laurie2018-12-071-1/+1
* soc/intel/cannonlake: Increase bootblock sizeDuncan Laurie2018-12-041-1/+1
* soc/intel/*: Make FSP header path user configurablePatrick Georgi2018-10-271-1/+1
* soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh2018-10-251-0/+1
* intel: Use CF9 reset (part 2)Patrick Rudolph2018-10-221-1/+0
* soc/intel/cannonlake: Enable HDA driver supportpraveen hodagatta pranesh2018-10-191-0/+1
* soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh2018-10-171-3/+3
* soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh2018-10-171-0/+1
* drivers/intel/fsp2_0: Hook up IntelFSP repoPatrick Georgi2018-10-121-0/+14
* soc/intel/denverton_ns: Enable common block PMCJulien Viard de Galbert2018-09-141-0/+1
* src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner2018-09-131-1/+1
* soc/intel/cannonlake: Correct number of root ports for CNL PCH HMaulik V Vaghela2018-09-101-0/+1
* soc/intel/cannonlake: Change LPDDR4 to MEMCFGLijian Zhao2018-08-281-1/+1
* soc/intel/coffeelake: Add initial coffeelake supportLijian Zhao2018-08-031-0/+13
* soc/intel/cannonlake: Disable UART_DEBUG by defaultSubrata Banik2018-06-231-1/+1
* drivers/intel/gma: Unify VBT related Kconfig namesNico Huber2018-06-121-1/+1
* arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki2018-06-061-3/+1
* soc/intel/common/block: Add common chip config blockSubrata Banik2018-06-061-0/+5
* soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNLSubrata Banik2018-06-061-22/+1
* soc/intel/cannonlake: Enable IDT and expection handling support for all stagesAamir Bohra2018-05-301-0/+1
* soc/intel/cannonlake: Select common XHCI codeSubrata Banik2018-05-271-0/+1
* soc/intel/cannonlake: Reduce STACK_SIZE to 4KiBSubrata Banik2018-05-251-4/+0
* soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE configSubrata Banik2018-05-191-0/+4
* soc/intel/cannonlake: Include stage cache support for CNLSubrata Banik2018-05-051-0/+1
* ifdtool: Add a list of known platforms that support IFD_VERSION_2Furquan Shaikh2018-05-041-0/+4
* soc/intel/cannonlake: Set Cannonlake I2C clockLijian Zhao2018-04-101-1/+1
* soc/intel/common: prepare for lpss clock splitAaron Durbin2018-04-101-2/+2
* soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabledDuncan Laurie2018-03-281-0/+1
* soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP...Subrata Banik2018-02-071-0/+2
* soc/intel/cannonlake: Increase heap sizeJohn Zhao2018-02-061-0/+4
* soc/intel/cannonlake: CannonaLake make use of FVI informationSubrata Banik2018-01-311-0/+1
* drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driverSubrata Banik2018-01-311-0/+1
* mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker ampN, Harshapriya2018-01-231-0/+7
* soc/intel/cannonlake: Add audio NHLT supportLijian Zhao2018-01-231-0/+37
* soc/intel/cannonlake: Add option to select FSP_CARSubrata Banik2018-01-171-2/+27
* soc/intel/cannonlake: provide LPDDR4 memory initNick Vaccaro2018-01-071-0/+4
* soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao2018-01-051-1/+1
* soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2Furquan Shaikh2017-12-231-1/+1
* ic2/designware: Move Intel i2c logic to shared driverChris Ching2017-12-221-0/+4
* soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()Aaron Durbin2017-12-161-1/+0
* soc/intel/cannonlake: Make use of Intel common Graphics blockSubrata Banik2017-12-071-0/+1
* soc/intel/cannonlake: Define default LPSS clockLijian Zhao2017-11-131-0/+4
* soc/intel/cannonlake: Make use of Intel SPI common blockSubrata Banik2017-11-111-0/+1
* soc/intel/cannonlake: Add DSP supportLijian Zhao2017-11-041-0/+1
* soc/intel/cannonlake: Install common i2cLijian Zhao2017-11-041-0/+1
* soc/intel/cannonlake: Use SCS common codeBora Guvendik2017-11-011-0/+1
* soc/intel/cannonlake: Use common p2sb driverLijian Zhao2017-10-271-0/+1
* soc/intel/cannonlake: Increase stack size from 4KiB to 8KiBJohn Zhao2017-10-231-0/+4