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path: root/src/soc/intel/cannonlake/Kconfig
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* soc/intel/cannonlake: Change max root port to 16Lijian Zhao2017-10-221-1/+1
* soc/intel/cannonlake: Add IGD Support and pre-OS display codeAbhay Kumar2017-10-191-0/+1
* soc/intel/cannonlake: Use EBDA area to store cbmem_top addressSubrata Banik2017-10-181-0/+1
* soc/intel/cannonlake: Change default UART number to 2Lijian Zhao2017-10-111-1/+1
* soc/intel/cannonlake: Enable MRC cacheLijian Zhao2017-10-061-0/+2
* soc/intel/cannonlake: reduce bootblock sizeAaron Durbin2017-10-061-0/+4
* soc/intel/cannonlake: Fill the SMI usageLijian Zhao2017-10-031-0/+4
* soc/intel/cannonlake: Add lpc pci driverLijian Zhao2017-10-031-0/+3
* soc/intel/cannonlake: Add FSP GOP supportAbhay kumar2017-09-271-0/+2
* soc/intel/cannonlake: Add common ACPI support for CNLLijian Zhao2017-09-131-0/+3
* soc/intel/cannonlake: Add Vboot/ChromeOS supportLijian Zhao2017-09-061-0/+11
* soc/intel/cannonlake: Define Max PCIE Root PortsPratik Prajapati2017-09-011-0/+4
* soc/intel/cannonlake: add gpio files to makeNick Vaccaro2017-09-011-0/+1
* soc/intel/canonlake: Enable LPSS UART in 32bit PCI modeLijian Zhao2017-09-011-1/+2
* soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLESubrata Banik2017-08-301-0/+1
* soc/intel/cannonlake: Init UPD params based on configPratik Prajapati2017-08-251-0/+8
* soc/intel/cannonlake: Add cpu.c and MP init supportPratik Prajapati2017-08-241-1/+4
* soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao2017-08-211-0/+2
* soc/intel/cannonlake: Add Kconfig option to select UART indexSubrata Banik2017-08-211-0/+7
* soc/intel/cannonlake: Add SPI flash controller driverLijian Zhao2017-08-171-0/+9
* soc/intel/cannonlake: Add postcar stage supportLijian Zhao2017-08-151-0/+11
* soc/cannonlake: Enable SMM code for Cannon LakeBrandon Breitenstein2017-08-111-0/+2
* soc/intel/cannonlake: Sort Kconfig for CannonlakeLijian Zhao2017-08-031-14/+14
* Revert "soc/intel/cannonlake: Add postcar stage support"Martin Roth2017-07-211-2/+0
* soc/intel/cannonlake: Add postcar stage supportLijian Zhao2017-07-211-0/+2
* soc/intel/cannonlake: Make ramstage relocatableLijian Zhao2017-07-201-0/+1
* soc/intel/cannonlake: Add microcode supportLijian Zhao2017-07-191-0/+2
* soc/intel/cannonlake: Use common GPIO driverAndrey Petrov2017-07-181-0/+1
* soc/intel/cannonlake: Add early CPU initializationAndrey Petrov2017-07-131-0/+6
* soc/intel/cannonlake: Add initial dummy directoryLijian Zhao2017-06-291-0/+67
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