| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi | 2020-05-06 | 1 | -12/+1 |
| * | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi | 2020-05-06 | 1 | -2/+1 |
| * | soc/intel: Remove unneeded whitespaces | Elyes HAOUAS | 2020-04-09 | 1 | -1/+1 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | soc/intel/cannonlake: Move GPIO PM configuration to soc level | Eric Lai | 2019-12-26 | 1 | -0/+17 |
| * | soc/intel/cannonlake: Make EC S0ix notification optional in LPIT | Tim Wawrzynczak | 2019-07-11 | 1 | -8/+17 |
| * | soc/intel/cannonlake/acpi: Add board level s0ix call back | Eric Lai | 2019-05-06 | 1 | -0/+10 |
| * | src/soc/intel/cannonlake: Add _DSM methods for LPIT table | Lijian Zhao | 2019-02-20 | 1 | -0/+76 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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