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path:
root
/
src
/
soc
/
intel
/
cannonlake
/
acpi
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/cannonlake: Add cannonlake ACPI GPIO op
Lijian Zhao
2019-01-03
3
-35
/
+77
*
soc/intel/cannonlake: Fix GPIO reporting
Duncan Laurie
2018-12-10
2
-23
/
+10
*
soc/intel/cannonlake: Add DPTF ACPI code
Duncan Laurie
2018-12-04
1
-0
/
+45
*
cpu/intel/common: Use a common acpi/cpu.asl file
Arthur Heymans
2018-11-30
1
-35
/
+0
*
soc/intel/common: Rework acpi/cpu.asl
Arthur Heymans
2018-11-30
1
-24
/
+16
*
soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices
Subrata Banik
2018-11-15
4
-332
/
+51
*
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...
Subrata Banik
2018-11-07
2
-35
/
+0
*
soc/intel/cannonlake: Enable S4 sleep state support
praveen hodagatta pranesh
2018-10-25
1
-1
/
+2
*
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-10-17
2
-0
/
+132
*
soc/intel/cannonlake: Add PCIE ASL entry
Subrata Banik
2018-10-09
2
-0
/
+385
*
soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices
Subrata Banik
2018-10-09
3
-80
/
+411
*
soc/intel/cannonlake: Add ACPI entry for LAN
Lijian Zhao
2018-09-28
2
-1
/
+33
*
soc/intel/cannonlake: Fix comment errors for SMBUS
Lijian Zhao
2018-08-30
1
-1
/
+1
*
soc/intel/cannonlake: Clear EMMC timeout when boot source is not EMMC
Bora Guvendik
2018-04-05
1
-4
/
+24
*
soc/intel/cannonlake: Clear EMMC timeout register
Lijian Zhao
2018-02-22
2
-3
/
+13
*
soc/intel/cannonlake: Update GPIO ASL
Lijian Zhao
2018-02-16
1
-5
/
+32
*
soc/intel/cannonlake: Use common PCR ASL
Lijian Zhao
2018-02-16
2
-24
/
+1
*
soc/intel/cannonlake: Add child CARD device into eMMC/SD controller
Subrata Banik
2018-01-24
1
-0
/
+20
*
soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code
Subrata Banik
2018-01-24
1
-2
/
+13
*
soc/intel/cannonlake: Port eMMC controller W/A from Intel Reference code
Subrata Banik
2018-01-24
1
-4
/
+16
*
src/soc/intel/cannonlake: Add _PRW for CNVi
Bora Guvendik
2017-12-13
2
-0
/
+35
*
soc/intel/cannonlake: Add PM methods to power gate SD card controller
Vaibhav Shankar
2017-11-23
1
-0
/
+17
*
soc/intel/cannonlake: Add ACPI workaround for EMMC
Lijian Zhao
2017-11-20
1
-0
/
+20
*
soc/intel/cannonlake: Add cpu.asl file
Shaunak Saha
2017-11-17
1
-0
/
+43
*
soc/intel/cannonlake: Fix and clean up xhci ACPI code
Vaibhav Shankar
2017-11-15
1
-142
/
+0
*
soc/intel/cannonlake: Add platform.asl
Lijian Zhao
2017-10-20
1
-24
/
+2
*
soc/intel/cannonlake: add length information for communities
Bora Guvendik
2017-10-12
1
-0
/
+6
*
soc/intel/cannonlake: Add ACPI platform sleep capability
Vaibhav Shankar
2017-10-12
1
-0
/
+20
*
soc/intel/cannonlake: Add all the SOC level DSDT tables
Lijian Zhao
2017-10-05
8
-0
/
+635
*
soc/intel/cannonlake: add initial ASL methods for SCS, GPIO
Bora Guvendik
2017-10-03
4
-0
/
+158
*
soc/intel/cannonlake: Add northbridge dsdt table
Lijian Zhao
2017-10-03
1
-5
/
+324
*
soc/intel/cannonlake: Add PCIE IRQs
Bora Guvendik
2017-09-19
3
-0
/
+141
*
soc/intel/cannonlake: Add common ACPI support for CNL
Lijian Zhao
2017-09-13
1
-0
/
+57