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path: root/src/soc/intel/cannonlake/bootblock/pch.c
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* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-6/+5
* soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn2020-02-171-2/+2
* soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn2020-02-171-0/+5
* soc/intel/cannonlake: Refactor pch_early_init() codeUsha P2019-12-261-11/+2
* soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik2019-12-031-0/+4
* soc/intel/{cnl,icl,skl}: Fix multiple whitespace issueSubrata Banik2019-10-311-1/+1
* soc/intel/cannonlake: Add 4E/4F to early io initChristian Walter2019-08-161-1/+1
* post_code: add post code for hardware initialization failureKeith Short2019-05-221-1/+2
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-0/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik2019-01-101-33/+3
* soc: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-191-1/+0
* soc/intel/cannonlake: Fix IO decode setupDuncan Laurie2018-11-211-11/+29
* soc/intel/cannonlake: Update PMC base address for CNP H and LPMaulik V Vaghela2018-08-301-8/+34
* soc/intel/common/block: Move common uart function to block/uartSubrata Banik2018-08-201-0/+1
* soc/intel/common/block: Move p2sb common functions into block/p2sbSubrata Banik2018-06-281-21/+4
* src: Use of device_t is deprecatedElyes HAOUAS2018-06-141-1/+1
* soc/intel/cannonlake: enable pch link in bootblockCaveh Jalali2018-01-251-0/+4
* soc/intel/cannonlake: Program DMI PCR settingsLijian Zhao2018-01-161-6/+1
* soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblockFurquan Shaikh2018-01-101-0/+2
* soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao2018-01-051-0/+4
* soc/intel/cannonlake: Fix HECI error on resetLijian Zhao2017-10-191-3/+0
* soc/intel/cannonlake: Use EBDA area to store cbmem_top addressSubrata Banik2017-10-181-2/+0
* soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao2017-08-211-1/+1
* soc/intel/cannonlake: Add memory map supportLijian Zhao2017-08-071-0/+2
* soc/intel/cannonlake: Fix Build breakLijian Zhao2017-07-181-1/+1
* soc/intel/cannonlake: Add bootblock PCHAndrey Petrov2017-07-131-0/+199
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