| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/intel/cnl: Select CSE defined ME spec version for cannonlake | Dinesh Gehlot | 2023-02-24 | 1 | -78/+0 |
| * | soc/intel/cnl: Move ME FSR structures to pertinent header | Dinesh Gehlot | 2023-02-01 | 1 | -30/+58 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | soc/intel/cannonlake: Use SPDX for GPL-2.0-only files | Angel Pons | 2020-04-06 | 1 | -13/+2 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | src/intel: Define HFSTS3 register | Sridhar Siricilla | 2020-02-17 | 1 | -0/+14 |
| * | soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoC | Sridhar Siricilla | 2020-02-09 | 1 | -0/+28 |
| * | soc/intel/cannonlake: Dump ME status info before notify EndOfFirmware | Bora Guvendik | 2019-05-28 | 1 | -1/+1 |
| * | soc/intel/cannonlake: Dump ME f/w version and status information | Tim Wawrzynczak | 2019-05-22 | 1 | -0/+21 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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