coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel: Drop `romstage_pch_init()` function	Angel Pons	2021-03-01	1	-1/+0
*	soc/intel/{skl,cnl}: Uniformize romstage.h whitespace	Angel Pons	2021-02-25	1	-1/+0
*	soc: move mainboard_get_dram_part_num prototype to memory_info.h	Nick Vaccaro	2020-10-05	1	-2/+0
*	mb, soc: change mainboard_get_dram_part_num() prototype	Nick Vaccaro	2020-10-05	1	-1/+1
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/intel/cannonlake: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-13/+2
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	1	-2/+0
*	soc/intel/cannonlake: Refactor pch_early_init() code	Usha P	2019-12-26	1	-0/+1
*	soc/intel/cannonlake: Allow mainboard to override DRAM part number	Furquan Shaikh	2019-03-13	1	-0/+3
*	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS	2018-11-12	1	-1/+0
*	soc/intel/cannonlake: Init UPD params based on config	Pratik Prajapati	2017-08-25	1	-0/+8
*	soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit	Lijian Zhao	2017-07-19	1	-0/+26