| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi | 2020-05-09 | 1 | -9/+1 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P | 2019-12-26 | 1 | -0/+1 |
| * | soc/intel/{apl,cnl,dnv,icl,skl} : Use common cpu/intel/car/romstage.c code | Subrata Banik | 2019-08-27 | 1 | -0/+1 |
| * | soc/intel/cannonlake: Move power_state functions to pmutil.c | V Sowmya | 2019-03-07 | 1 | -1/+0 |
| * | soc/intel/cannonlake: Move the FSP related callbacks to separate files | Rizwan Qureshi | 2018-10-04 | 1 | -0/+1 |
| * | soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit | Lijian Zhao | 2017-07-19 | 1 | -0/+18 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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