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path: root/src/soc/intel/cannonlake/romstage
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* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-1/+1
* soc/intel: Replace uses of dev_find_slot()Kyösti Mälkki2019-07-041-4/+4
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-1/+2
* soc/intel: Provide SPD manufacturer ID and module type to SMBIOSDuncan Laurie2019-06-211-1/+3
* soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans2019-06-211-1/+1
* vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155Aamir Bohra2019-06-121-0/+4
* src/soc/intel/common/smbios: Add addtional infos to dimm_infoChristian Walter2019-06-061-1/+5
* soc/intel: Fill DIMM serial number from SPDDuncan Laurie2019-05-181-0/+1
* soc/intel/cnl: Enable VT-dJohn Zhao2019-05-111-0/+5
* soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS2019-04-262-2/+4
* soc/intel/cannonlake: Enable PlatformDebugConsent by KconfigKane Chen2019-04-231-2/+3
* src: include <assert.h> when appropriateElyes HAOUAS2019-04-231-1/+0
* Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"Lijian Zhao2019-04-221-4/+1
* soc/intel/cannonlake: Configure Vmx support using KconfigRonak Kanabar2019-04-161-5/+2
* soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CMLSubrata Banik2019-04-161-1/+4
* soc/intel/cannonlake: Update CPU Ratio base on MSRLijian Zhao2019-03-281-13/+6
* soc/intel/common: Remove common chip config use_fsp_mp_initSubrata Banik2019-03-241-1/+2
* soc/intel/cannonlake: Pass coreboot debug interface info to FSPMaulik V Vaghela2019-03-181-0/+11
* soc/intel/cannonlake: Allow mainboard to override DRAM part numberFurquan Shaikh2019-03-131-2/+17
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* soc/intel/cannonlake: Move power_state functions to pmutil.cV Sowmya2019-03-072-89/+0
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* soc/intel: Add mem_rank info in SMBIOSFrancois Toguo2019-02-181-0/+1
* soc/intel/cannonlake: Don't use CAR_GLOBALArthur Heymans2019-02-132-2/+0
* soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik2019-02-071-1/+1
* soc/intel/cannonlake: Disable CpuRatio and SaGv in recoveryDuncan Laurie2019-01-251-0/+17
* soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik2019-01-101-5/+3
* soc/intel/cannonlake: Enable/Disable IPU based on devicetree switchV Sowmya2019-01-091-0/+5
* soc/intel/cannonlake: Fix chipset_power_state structureDuncan Laurie2019-01-081-3/+1
* soc/intel/cannonlake: Auto turn on HDA controllerLijian Zhao2018-12-191-0/+8
* soc/intel/cannonlake: Enable CPU flexible ratioLijian Zhao2018-12-191-2/+0
* src: Remove unneeded include <cbmem.h>Elyes HAOUAS2018-11-161-1/+0
* soc/intel/cannonlake: Remove SmbusEnableDuncan Laurie2018-11-131-1/+5
* soc/intel/cannonlake: Enable ISH from deviceLijian Zhao2018-11-051-0/+6
* soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh2018-10-171-1/+1
* soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh2018-10-171-1/+4
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* soc/intel/cannonlake: Move the FSP related callbacks to separate filesRizwan Qureshi2018-10-043-55/+78
* soc/intel/common: add acpi_get_sleep_type to pmclibBora Guvendik2018-10-041-8/+0
* soc/intel/cannonlake: Move SkipMpInit config to FSPMLijian Zhao2018-09-281-0/+4
* soc/{amd,intel}: Use postcar_frame_add_romcache()Nico Huber2018-06-041-2/+1
* soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE)Nico Huber2018-05-311-2/+2
* compiler.h: add __weak macroAaron Durbin2018-04-241-1/+2
* soc/intel/cannonlake: Set DISB after Dram initLijian Zhao2018-04-191-0/+1
* soc/intel/cannonlake: Add VT-d and VMX programmingLijian Zhao2018-04-051-0/+5
* src/soc: Fix various typosJonathan Neuschäfer2018-02-201-3/+3
* intel/fsp: Update cannonlake fsp headerLijian Zhao2018-02-141-7/+0
* soc/intel/cannonlake: Save DIMM information for SMBIOS Table type 17Subrata Banik2018-02-081-0/+83
* soc/intel/cannonlake: enable pch link in bootblockCaveh Jalali2018-01-251-3/+0
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