| Commit message (Expand) | Author | Age | Files | Lines |
* | pci_ids/intel: Add missing CFL-S GT1 IGD IDs | Nico Huber | 2021-02-03 | 1 | -0/+2 |
* | pci_ids/intel: Correct 0x3e96, it's a CFL-S part | Nico Huber | 2021-02-03 | 1 | -1/+1 |
* | src: Remove unused <cbmem.h> | Elyes HAOUAS | 2021-02-03 | 1 | -1/+0 |
* | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner | 2021-01-31 | 1 | -16/+1 |
* | soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options | Angel Pons | 2021-01-30 | 1 | -1/+1 |
* | arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits | Kyösti Mälkki | 2021-01-28 | 1 | -4/+0 |
* | soc/intel: Move c-state resource define | Marc Jones | 2021-01-26 | 1 | -9/+0 |
* | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner | 2021-01-25 | 2 | -39/+2 |
* | soc/intel/cnl: use Kconfig to determine PCH type | Michael Niewöhner | 2021-01-24 | 4 | -48/+2 |
* | ACPI: Add helpers for CBMEM_ID_POWER_STATE | Kyösti Mälkki | 2021-01-23 | 1 | -5/+3 |
* | ELOG: Add const qualifier for chipset_power_state | Kyösti Mälkki | 2021-01-23 | 1 | -2/+2 |
* | soc/intel/cometlake: Add ucode for CML-H | Tim Crawford | 2021-01-23 | 1 | -1/+3 |
* | soc/intel/cannonlake: Allow RP#1 usage for ClkSrc | Jeremy Soller | 2021-01-21 | 2 | -0/+4 |
* | soc/intel/*: drop broken LPC mmio code | Michael Niewöhner | 2021-01-20 | 1 | -15/+0 |
* | ACPI GNVS: Drop most dev_count_cpu() | Kyösti Mälkki | 2021-01-20 | 1 | -3/+0 |
* | soc/intel: rename uart_max_index | Michael Niewöhner | 2021-01-12 | 1 | -1/+1 |
* | soc/intel/cnl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner | 2021-01-11 | 2 | -0/+3 |
* | {soc,vc,mb}/intel: Drop support for Cannon Lake SoC | Felix Singer | 2021-01-11 | 4 | -34/+0 |
* | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh | 2021-01-11 | 1 | -21/+5 |
* | soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-S | Jeremy Soller | 2021-01-11 | 1 | -0/+47 |
* | soc/intel/cannonlake: Enable wake from USB in S4 | Patrick Rudolph | 2021-01-11 | 1 | -1/+4 |
* | soc/intel: Rename to soc_fill_gnvs() | Kyösti Mälkki | 2021-01-10 | 1 | -1/+1 |
* | ACPI: Drop redundant ChromeOS setup for GNVS | Kyösti Mälkki | 2021-01-10 | 1 | -13/+0 |
* | ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS | Kyösti Mälkki | 2021-01-10 | 1 | -4/+0 |
* | soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range() | Furquan Shaikh | 2021-01-08 | 1 | -2/+2 |
* | soc/intel/cnl: add panel and backlight configuration code | Michael Niewöhner | 2021-01-01 | 3 | -0/+69 |
* | soc/intel/common: Move gfx.asl to drivers/intel/gma | Matt DeVillier | 2020-12-30 | 1 | -1/+1 |
* | soc/intel/cnl: add Kconfig values for GMA backlight registers | Michael Niewöhner | 2020-12-30 | 1 | -0/+12 |
* | soc/intel: hook up new gpio device in the soc chips | Michael Niewöhner | 2020-12-30 | 1 | -0/+3 |
* | soc/intel/cannonlake: Add Iccmax and loadlines for CML-S | Gaggery Tsai | 2020-12-22 | 1 | -0/+33 |
* | soc/intel/cannonlake: Change mainboard_silicon_init_params argument | Patrick Rudolph | 2020-12-17 | 2 | -3/+3 |
* | soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option | Shreesh Chhabbi | 2020-12-14 | 1 | -1/+1 |
* | soc/intel/cannonlake: Drop unreferenced devicetree settings | Angel Pons | 2020-12-14 | 1 | -32/+0 |
* | soc/intel/common: Adapt XHCI elog driver for reuse | Tim Wawrzynczak | 2020-12-10 | 2 | -24/+15 |
* | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik | 2020-12-09 | 1 | -3/+1 |
* | soc/intel/cannonlake: Restore alphabetical order of Kconfig selects | Felix Singer | 2020-12-08 | 1 | -10/+10 |
* | soc/intel/cannonlake: Align SATA mode names with soc/skl | Felix Singer | 2020-12-08 | 1 | -2/+2 |
* | soc/intel/{skl,cnl}: add NMI_{EN,STS} registers | Michael Niewöhner | 2020-12-04 | 4 | -0/+24 |
* | src: Remove redundant use of ACPI offset(0) | Elyes HAOUAS | 2020-12-03 | 1 | -2/+1 |
* | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh | 2020-11-29 | 1 | -2/+7 |
* | soc/intel/cannonlake: Add ICC limits for CFL-S DT 4 | Angel Pons | 2020-11-23 | 1 | -0/+6 |
* | soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD | Michael Niewöhner | 2020-11-20 | 1 | -2/+2 |
* | soc/intel/cnl: enable ACPI CPPC entries generation | Michael Niewöhner | 2020-11-14 | 1 | -0/+1 |
* | soc/intel/cnl: replace the remains of HeciEnabled by device state in dt | Michael Niewöhner | 2020-11-13 | 2 | -8/+5 |
* | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner | 2020-11-13 | 3 | -5/+3 |
* | soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling | Michael Niewöhner | 2020-11-13 | 2 | -14/+0 |
* | soc/intel/*/chip: Remove unused devicetree entry | Patrick Rudolph | 2020-11-09 | 1 | -1/+0 |
* | soc/intel: Use of common reset code block | Subrata Banik | 2020-11-02 | 2 | -17/+2 |
* | soc/intel: Add a driver for CNVi WiFi/BT controllers | Furquan Shaikh | 2020-11-02 | 1 | -0/+1 |
* | soc/intel: deduplicate ACPI timer emulation | Michael Niewöhner | 2020-10-28 | 1 | -25/+0 |