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path: root/src/soc/intel/cannonlake
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* soc/intel/cannonlake: Remove unused header files from southbridge.aslAamir Bohra2019-07-131-5/+0
* cpu/x86: Move smm_lock() prototypeKyösti Mälkki2019-07-131-0/+1
* soc/intel/cnl: Sync CONFIG_LPSS_UART_FOR_CONSOLE with FSPNico Huber2019-07-131-0/+3
* soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics idNico Huber2019-07-121-0/+1
* soc/intel/common: Add CM246 LPC device idNico Huber2019-07-121-0/+1
* soc/intel/cannonlake: Add GPID and CGPM methods to GPIO ASLTim Wawrzynczak2019-07-111-0/+50
* soc/intel/cannonlake: Make EC S0ix notification optional in LPITTim Wawrzynczak2019-07-111-8/+17
* soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timerSubrata Banik2019-07-111-8/+0
* soc/intel: Remove invalid smm_relocate stubsKyösti Mälkki2019-07-101-11/+0
* arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki2019-07-091-1/+0
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* soc/intel/{cannonlake,icelake}: Do not define PCH_DEV_PMC in ramstageFurquan Shaikh2019-07-071-0/+12
* soc/intel/cannonlake, mb/google/sarien: Get rid of unused dev paramFurquan Shaikh2019-07-072-7/+6
* soc/intel/cannonlake: Use SA_DEV_ROOT instead of PCH_DEV_PMCFurquan Shaikh2019-07-072-2/+7
* soc/intel/cannonlake: Fix outb orderJeremy Soller2019-07-061-2/+2
* soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik2019-07-061-0/+4
* soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-HJeremy Soller2019-07-052-19/+24
* soc/intel: Replace uses of dev_find_slot()Kyösti Mälkki2019-07-047-19/+19
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-1/+2
* soc/intel/cannonlake: Add support to log XHCI wake eventsPaul Fagerburg2019-07-022-2/+17
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-012-4/+20
* soc/intel/cannonlake: fix use of legacy 8254 timerMatt DeVillier2019-06-284-13/+12
* soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNON...Arthur Heymans2019-06-262-15/+14
* soc/intel: Provide SPD manufacturer ID and module type to SMBIOSDuncan Laurie2019-06-211-1/+3
* soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans2019-06-214-8/+8
* soc/intel/{cml, whl}: Add option to skip HECI disable in SMMSubrata Banik2019-06-132-1/+2
* vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155Aamir Bohra2019-06-121-0/+4
* soc/intel/cannonlake: Add _DSM method for SD controllerV Sowmya2019-06-071-0/+62
* src/soc/intel/common/smbios: Add addtional infos to dimm_infoChristian Walter2019-06-061-1/+5
* soc/intel/cannonlake: Do not read SPD again if index hasn't changedFurquan Shaikh2019-06-041-10/+21
* soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber2019-06-032-8/+5
* soc/intel/{skl,cnl,icl}: Drop soc_uart_set_legacy_mode()Nico Huber2019-06-031-15/+0
* src/soc: Add missing 'include <types.h>'Elyes HAOUAS2019-05-291-0/+1
* soc/intel/cannonlake: Dump ME status info before notify EndOfFirmwareBora Guvendik2019-05-283-5/+5
* post_code: add post code for hardware initialization failureKeith Short2019-05-222-2/+4
* soc/intel/cannonlake: Dump ME f/w version and status informationTim Wawrzynczak2019-05-224-0/+324
* soc/intel: Remove unused pointer argument in mca_configure()Subrata Banik2019-05-211-1/+1
* soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.Tim Wawrzynczak2019-05-201-0/+43
* soc/intel/cannonlake: Make use of gpio_pm_configure()Subrata Banik2019-05-206-11/+86
* soc/intel: Fill DIMM serial number from SPDDuncan Laurie2019-05-181-0/+1
* soc/intel/cannonlake: Support different SPD read type for each slotPhilip Chen2019-05-152-66/+83
* soc/intel/{cannonlake,icelake}: Drop unused cbmem.c fileElyes HAOUAS2019-05-131-22/+0
* soc/intel/cnl: Enable VT-dJohn Zhao2019-05-114-15/+14
* soc/intel/cannonlake: Fix pcie clock numberLijian Zhao2019-05-092-2/+7
* mb/google/sarien: Add SMBIOS type 9 fieldsLijian Zhao2019-05-071-0/+1
* soc/intel/cannonlake/acpi: Add board level s0ix call backEric Lai2019-05-061-0/+10
* soc/intel/cannonlake: Add GPIO dual-route support.Tim Wawrzynczak2019-05-061-0/+1
* mb/google/sarien: Disable S5 wake on LAN by defaultEric Lai2019-05-012-0/+8
* vboot: refactor OPROM codeJoel Kitching2019-04-301-1/+1
* soc/intel: Add GPI interrupt config register offset infoKarthikeyan Ramasubramanian2019-04-294-0/+24
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