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path:
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intel
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cannonlake
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled
Felix Singer
2020-07-28
1
-5
/
+1
*
src: Update bare access to BOOL CONFIG_ vals to CONFIG()
Martin Roth
2020-07-26
2
-4
/
+4
*
cpu,soc/intel: Drop select SMP
Kyösti Mälkki
2020-07-26
1
-1
/
+0
*
src: Remove unused 'include <cbmem.h>'
Elyes HAOUAS
2020-07-26
1
-1
/
+0
*
soc/intel/cannonlake: Move tco_configure to bootblock
Tim Wawrzynczak
2020-07-22
2
-4
/
+4
*
src: Use ACPI macros
Elyes HAOUAS
2020-07-21
1
-1
/
+1
*
soc/intel/cannonlake: Add configs for USB 3.1 Gen2 EV settings
Jamie Chen
2020-07-20
2
-0
/
+81
*
src: Remove unused 'include <stdint.h>
Elyes HAOUAS
2020-07-14
1
-1
/
+0
*
soc/intel: Drop unused `#include <reg_script.h>`
Angel Pons
2020-07-06
2
-2
/
+0
*
soc/intel/cannonlake: make satahotplug user configurable via devicetree
Jonas Loeffelholz
2020-07-01
2
-0
/
+5
*
soc/intel/cannonlake: Add UWES ASL into xhci.asl
Edward O'Callaghan
2020-06-30
1
-0
/
+73
*
ACPI: Drop typedef global_nvs_t
Kyösti Mälkki
2020-06-30
1
-1
/
+2
*
src: Remove whitespaces before tabs
Elyes HAOUAS
2020-06-30
1
-1
/
+1
*
soc/intel/common: add TCC activation functionality
Sumeet R Pawnikar
2020-06-28
1
-20
/
+1
*
soc/intel/cannonlake: Add PchPmPwrCycDur to chip options
Sridhar Siricilla
2020-06-25
2
-0
/
+144
*
soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE define
Edward O'Callaghan
2020-06-25
1
-0
/
+7
*
soc/intel/cannonlake: Enable FSP-S compression
Karthikeyan Ramasubramanian
2020-06-18
1
-0
/
+1
*
soc/intel: remove unused dptf.asl file and other defines
Sumeet R Pawnikar
2020-06-18
1
-32
/
+0
*
soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimit
Patrick Rudolph
2020-06-17
1
-4
/
+79
*
soc/intel/cannonlake: Use table instead of switch-case
Patrick Rudolph
2020-06-17
2
-417
/
+439
*
cpu/x86: Define MTRR_CAP_PRMRR
Kyösti Mälkki
2020-06-16
1
-1
/
+1
*
soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)
Kyösti Mälkki
2020-06-16
1
-1
/
+1
*
arch/x86: Create helper for APM_CNT SMI triggers
Kyösti Mälkki
2020-06-16
1
-3
/
+1
*
soc/intel/cannonlake/acpi: Capitalize hex number to unify with Skylake
Paul Menzel
2020-06-14
1
-1
/
+1
*
soc/intel/cannonlake: Put braces around *else* branch
Paul Menzel
2020-06-10
1
-1
/
+2
*
ACPI: Remove Kconfig COMMON_FADT
Kyösti Mälkki
2020-06-10
1
-1
/
+0
*
soc/intel/common/{pch,sata}: Remove SATA common code driver
Subrata Banik
2020-06-02
1
-1
/
+0
*
soc/intel/cannonlake: Add RP configuration settings
Christian Walter
2020-06-02
2
-1
/
+36
*
soc/intel/*/bootblock/cpu.c: Drop unused includes
Elyes HAOUAS
2020-06-02
1
-1
/
+0
*
src: Remove unused '#include <cpu/x86/lapic.h>'
Elyes HAOUAS
2020-06-02
1
-1
/
+0
*
soc/intel/common: Improve Type16 SMBIOS tables
Patrick Rudolph
2020-05-28
1
-0
/
+14
*
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
Nico Huber
2020-05-27
2
-14
/
+0
*
soc/intel/gma: Move DDI-A 4-lane config to common code
Nico Huber
2020-05-27
2
-17
/
+3
*
soc/intel/gma: Move display and opregion init to common code
Nico Huber
2020-05-27
1
-33
/
+0
*
drivers/intel/gma: Move IGD OpRegion to CBMEM
Nico Huber
2020-05-27
1
-16
/
+2
*
cannonlake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-26
6
-214
/
+18
*
soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options
Christian Walter
2020-05-26
2
-0
/
+8
*
intel/cannonlake: Implement PCIe RP devicetree update
Nico Huber
2020-05-26
1
-0
/
+20
*
src: Remove unused 'include <string.h>'
Elyes HAOUAS
2020-05-18
1
-1
/
+0
*
src: Remove leading blank lines from SPDX header
Elyes HAOUAS
2020-05-18
1
-3
/
+0
*
soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()
Furquan Shaikh
2020-05-14
1
-2
/
+0
*
soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G
Furquan Shaikh
2020-05-14
1
-1
/
+0
*
device/pci_device: Extract pci_domain_set_resources from SOC
Raul E Rangel
2020-05-12
1
-5
/
+0
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
89
-89
/
+0
*
src/: Replace GPL boilerplate with SPDX headers
Patrick Georgi
2020-05-09
1
-9
/
+1
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
12
-144
/
+12
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
12
-24
/
+12
*
soc/intel/cannonlake: Add DisableHeciRetry to config
Christian Walter
2020-05-04
2
-0
/
+5
*
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-02
3
-4
/
+4
*
soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
2
-9
/
+7
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