coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-14/+2
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	1	-1/+0
*	soc/intel/common: Make alignment proper for comments	Subrata Banik	2019-11-15	1	-1/+1
*	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans	2019-11-12	1	-1/+1
*	soc/intel/common: Fix typo mistake in cache_as_ram.S	Subrata Banik	2019-08-12	1	-1/+1
*	cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset	Arthur Heymans	2019-04-21	1	-15/+2
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-6/+6
*	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS	2018-10-11	1	-8/+9
*	src/soc: Get rid of whitespace before tab	Elyes HAOUAS	2018-06-04	1	-2/+2
*	src/soc: Fix various typos	Jonathan Neuschäfer	2018-02-20	1	-1/+1
*	intel/common: CAR setup CQOS	Naresh G Solanki	2017-10-16	1	-3/+28
*	arch/x86: update assembly to ensure 16-byte alignment into C	Aaron Durbin	2017-06-29	1	-0/+5
*	soc/intel/common/block: Add cache as ram init and teardown code	Subrata Banik	2017-03-28	1	-0/+440