summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/common/block/cpu/mp_init.c
Commit message (Expand)AuthorAgeFilesLines
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/common: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-0/+1
* soc/intel: Remove duplicate CPUID entrySubrata Banik2020-02-041-1/+0
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+1
* src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai2019-12-021-1/+3
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+1
* soc/intel: Rename <intelblocks/chip.h>Kyösti Mälkki2019-09-291-1/+1
* soc/*: mp_run_on_all_cpus: Remove configurable timeoutPatrick Rudolph2019-08-151-1/+1
* soc/intel/cannonlake: Add new PCI IDsFelix Singer2019-07-301-0/+1
* soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan2019-07-171-0/+2
* soc/intel: Geminilake Refresh feature request supportJohn Zhao2019-05-131-0/+1
* src: Add missing include 'console.h'Elyes HAOUAS2019-04-231-0/+1
* soc/intel/common: Remove common chip config use_fsp_mp_initSubrata Banik2019-03-241-2/+2
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* soc/intel/common: Include cometlake CPU IDsRonak Kanabar2019-02-241-0/+4
* soc/intel/common: Add whiskeylake celeron v-0 supportLijian Zhao2019-02-191-0/+1
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+2
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* intel/common/block: Fix issues found by klockworkJohn Zhao2018-08-201-1/+2
* src/soc/intel: Add new device IDs to support coffeelakeMaulik2018-08-101-0/+2
* soc/intel/common/block: Add WhiskeyLake W0 CPUIDKrzysztof Sywula2018-07-181-0/+1
* soc/intel/common/block/cpu: Add option to skip coreboot AP initSubrata Banik2018-06-221-0/+7
* src: Get rid of device_tElyes HAOUAS2018-06-141-3/+3
* cpu/x86: Add support to run function with argument over APsSubrata Banik2018-05-141-1/+6
* compiler.h: add __weak macroAaron Durbin2018-04-241-2/+3
* intel/common/block/cpu: Change post_cpus_init after BS_DEV RESOURCESBarnali Sarkar2018-02-071-6/+2
* soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and reportLijian Zhao2018-01-261-0/+1
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-231-1/+1
* soc/intel/apollolake: Add APL CPU device IDMario Scheithauer2017-11-031-0/+1
* intel/common/mp_init: Refactor MP Init code to get rid of microcode paramPratik Prajapati2017-08-211-18/+5
* intel/common/cpu: Add function to get microcode patch pointerPratik Prajapati2017-08-211-1/+12
* soc/intel/common/block: Add CNL, APL and GLK CPU device IDsBarnali Sarkar2017-08-101-0/+7
* soc/intel/common/block: Add common MP Init codeBarnali Sarkar2017-06-231-0/+141