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path: root/src/soc/intel/common/block/cpu
Commit message (Expand)AuthorAgeFilesLines
* cpu/x86/64bit: Turn jumping to long mode into a macroArthur Heymans2024-02-081-1/+3
* soc/intel/common: Add lunarlake device IDsAppukuttan V K2024-01-261-0/+1
* soc/intel: Rename Makefiles from .inc to .mkMartin Roth2024-01-241-0/+0
* soc/intel/cmn/cpu: Introduce API to disable signaling 3-strike eventSubrata Banik2023-12-151-0/+9
* x86: Add .data section support for pre-memory stagesJeremy Compostella2023-09-142-0/+6
* cpu/intel: Move is_tme_supported() from soc/intel to cpu/intelJeremy Compostella2023-09-121-10/+0
* soc/intel/cpu: Only show MP PPI option when meaningfulArthur Heymans2023-09-011-2/+2
* src/*/post_code.h: Change post code prefix to POSTCODEYuchen He2023-08-051-14/+14
* soc/intel/common: Merge TME new key gen and exclusion range configsPratikkumar Prajapati2023-08-031-19/+10
* intelblocks/cpu/mp_init: Add missing ADL-S SKUs to CPU match tableMichał Żygowski2023-07-121-0/+4
* treewide: Drop the suffixes from ADL and RPL CPUID macros and stringsMichał Żygowski2023-07-121-7/+7
* soc/intel/alderlake: Add support for Raptor Lake S CPUsMax Fritz2023-07-121-0/+4
* soc/intel/meteorlake: Add QS(C0) stepping CPU IDMusse Abdullahi2023-06-291-0/+1
* commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious2023-06-232-3/+3
* soc/intel/common: Add configs for TME exclusion range and new key genPratikkumar Prajapati2023-06-161-0/+29
* soc/intel/meteorlake: Add B0 stepping CPU IDMusse Abdullahi2023-04-151-0/+1
* drivers/fsp2_0/mp_service_ppi: Use struct device to fill in bufferArthur Heymans2023-04-111-63/+0
* soc/intel/cmn/cpu: Add function to disable 3-strike CATERRSubrata Banik2023-04-061-0/+9
* soc/intel/{adl, cmn, mtl}: Refactor MP Init related configsSubrata Banik2023-02-251-0/+24
* soc/intel: Use common codeflow for MP initArthur Heymans2023-02-231-6/+2
* arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminatorFelix Held2023-02-091-1/+1
* treewide: Remove repeated wordsElyes Haouas2023-02-091-1/+1
* arch/x86/cpu: introduce and use device_match_maskFelix Held2023-02-081-50/+50
* tree: Drop Intel Ice Lake supportFelix Singer2023-01-191-2/+0
* soc/intel/common: Untie PRMRR from SGXPratikkumar Prajapati2023-01-082-3/+65
* soc/intel/common: Check PRMRR dependent featuresPratikkumar Prajapati2023-01-061-22/+46
* soc/intel/common: Add Kconfig option for Intel Key LockerPratikkumar Prajapati2023-01-061-0/+9
* soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macroPratikkumar Prajapati2023-01-061-4/+6
* soc/intel/common: Add API to check Key Locker supportPratikkumar Prajapati2023-01-041-0/+10
* soc/intel/common: Move SGX supported API to cpulibPratikkumar Prajapati2023-01-021-0/+10
* soc/intel: Move max speed API to commonDinesh Gehlot2022-12-251-0/+6
* cpu/intel: Fix clearing MTRR for clang 64bitArthur Heymans2022-12-161-5/+6
* soc/intel/common: Define post codesMartin Roth2022-11-232-21/+17
* soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>Elyes Haouas2022-11-041-2/+2
* soc: Add SPDX license headers to MakefilesMartin Roth2022-10-311-0/+1
* soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU IDJeremy Soller2022-09-161-1/+2
* src: remove force-included header rules.h from individual filesMartin Roth2022-09-061-1/+0
* soc/intel/cmn/cpu: API to set TME core activationSubrata Banik2022-08-221-0/+7
* soc/intel/common/block/cpu: API to check if TME is supportedSubrata Banik2022-08-211-0/+9
* soc/intel: Unravel `INTEL_TME` Kconfig optionAngel Pons2022-08-211-1/+1
* soc/intel/common/cpu: Remove the address-of (`&`) operator usageSubrata Banik2022-08-161-2/+2
* treewide: Remove unused <cpu/x86/msr.h>Elyes Haouas2022-07-201-1/+0
* */fsp/exit_car: Push stack address into %espArthur Heymans2022-07-091-1/+1
* soc/intel: Add Raptor Lake device IDszhixingma2022-06-281-0/+1
* soc/intel/mp_init: Skip before_post_cpus_init if !USE_COREBOOT_MP_INITSubrata Banik2022-06-221-0/+10
* soc/intel/cmn/block/cpu: Perform PRMRR sync on all coresSubrata Banik2022-06-221-0/+8
* intel/mp_init: Call `intel_reload_microcode()` before post_cpus_init()Subrata Banik2022-06-221-2/+1
* soc/intel/cmn/cpu: API to initialize core PRMRRSubrata Banik2022-06-141-0/+24
* soc/intel/common: Remove use of CPUID_EXTENDED_CPU_TOPOLOGY_V2Ronak Kanabar2022-06-141-6/+1
* soc/intel/cmn/mp_init: Reload microcode patch before post_cpus_init()Subrata Banik2022-06-091-0/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-18 17:30:51 +0000