| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/intel/skylake: Fix SPI WP disable status check | Ravi Sarawadi | 2017-09-11 | 1 | -1/+8 |
| * | soc/intel/common: Add function to DLOCK PR registers | Barnali Sarkar | 2017-08-25 | 1 | -0/+5 |
| * | soc/intel/common/fast_spi: support caching bios in ramstage | Aaron Durbin | 2017-06-09 | 1 | -1/+3 |
| * | soc/intel/common/block: add bios caching to fast spi module | Aaron Durbin | 2017-06-05 | 1 | -0/+4 |
| * | soc/intel/common: Provide common block fast_spi_flash_ctrlr | Furquan Shaikh | 2017-05-05 | 1 | -0/+6 |
| * | soc/intel/common/block: Add Intel common FAST_SPI code | Barnali Sarkar | 2017-05-01 | 1 | -0/+67 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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