coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	intelblocks/pcie: Correct mapping between LCAP port and coreboot index	MAULIK V VAGHELA	2022-02-25	1	-0/+6
*	soc/intel/tgl/pcie_rp: add TGL-H support	Michael Niewöhner	2022-01-14	1	-0/+3
*	soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function	Tim Wawrzynczak	2022-01-06	1	-0/+3
*	soc/intel/tigerlake: Define soc_get_pcie_rp_type	Tim Wawrzynczak	2021-12-13	1	-0/+4
*	soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h	Tim Wawrzynczak	2021-12-06	1	-0/+6
*	soc/intel/common/block: Create PCIE related macros	Subrata Banik	2021-01-30	1	-8/+48
*	soc/intel/common/pcie_rp.h: Fix comment style	Furquan Shaikh	2021-01-21	1	-14/+14
*	soc/intel/common: Move L1_substates_control to pcie_rp.h	Eric Lai	2021-01-18	1	-0/+8
*	soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguous	Furquan Shaikh	2021-01-18	1	-4/+18
*	soc/intel/common/pcie: Add helper function for getting mask of enabled ports	Furquan Shaikh	2021-01-12	1	-0/+15
*	src/soc/intel: Drop unneeded empty lines	Elyes HAOUAS	2020-09-21	1	-1/+0
*	src: Remove unused 'include <stdint.h>	Elyes HAOUAS	2020-07-14	1	-1/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-12/+2
*	soc/intel: Implement PCIe RP devicetree update based on LCAP	Nico Huber	2019-11-16	1	-0/+50