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path: root/src/soc/intel/common/block/lpc
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* soc/amd,intel: Drop leftover GNVS includesKyösti Mälkki2021-01-301-1/+0
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-251-1/+0
* soc/intel/lpc_lib: mirror LPC registers to DMI when requiredMichael Niewöhner2021-01-253-6/+29
* soc/intel/lpc_lib: drop dead codeMichael Niewöhner2021-01-241-8/+0
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-221-0/+32
* soc/intel/*: drop broken LPC mmio codeMichael Niewöhner2021-01-202-30/+0
* ACPI: Have single call-site for acpi_inject_nvsa()Kyösti Mälkki2021-01-131-1/+0
* soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik2021-01-121-1/+2
* soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range()Furquan Shaikh2021-01-081-7/+1
* intel/common/block/lpc: Add new device IDs for Emmitsburg PCHJonathan Zhang2020-12-141-0/+1
* soc/intel/common/block/lpc: Move southbridge_write_acpi_tables declarationMarc Jones2020-12-111-1/+0
* soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik2020-11-121-0/+1
* soc/intel: Move pch_misc_init() to common codeSubrata Banik2020-10-031-0/+18
* soc/intel: Move soc_pch_pirq_init() to common codeSubrata Banik2020-10-031-1/+70
* soc/intel: Move pch_enable_ioapic() to common codeSubrata Banik2020-10-031-0/+25
* soc/intel/common/block/lpc: add acpi nameJonathan Zhang2020-09-281-0/+8
* src/soc/intel: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* soc/intel/common: Include Alder Lake device IDsSubrata Banik2020-08-051-0/+64
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-0/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-113-3/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-063-36/+3
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-063-6/+3
* intel/common/block/lpc: Add new device IDs for Lewisburg PCHBryantOu2020-04-161-0/+6
* Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber2020-04-021-8/+8
* soc: Remove copyright noticesPatrick Georgi2020-03-183-4/+0
* soc/intel/skylake: Control fixed IO decode from devicetreeWim Vervoorn2020-03-181-0/+11
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-2/+1
* soc/intel/common/block/lpc: Drop unnecessary helper functionSubrata Banik2020-02-191-12/+1
* soc/intel/common/block/lpc: Add lpc_get_fixed_io_decodeWim Vervoorn2020-02-111-0/+5
* soc/intel/common/block/lpc: Add CMP-H LPC IDsGaggery Tsai2020-01-301-0/+7
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+8
* soc/intel: Fix ACPI device operations initializationKarthikeyan Ramasubramanian2020-01-121-0/+2
* soc/intel/common: Add Jasperlake Device IDsrkanabar2019-12-101-0/+2
* soc/intel/tigerlake: Include few more Tigerlake device IDsSubrata Banik2019-11-141-1/+32
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+1
* soc/intel/common: lpc/espi: fix wrong lock bitMichael Niewöhner2019-10-181-1/+1
* device: Use scan_static_bus() over scan_lpc_bus()Nico Huber2019-10-081-1/+1
* soc/intel/skylake: Add Lewisburg family PCH supportMaxim Polyakov2019-09-061-0/+13
* soc/intel/skl: Add C232 chipset and reorder IDsFelix Singer2019-07-311-3/+4
* soc/intel/cannonlake: Add new PCI IDsFelix Singer2019-07-301-1/+7
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-2/+2
* soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan2019-07-171-0/+1
* soc/intel/common: Add CM246 LPC device idNico Huber2019-07-121-0/+1
* soc/intel/common: Check bios_size and window_size after MIN operationJohn Zhao2019-07-111-1/+1
* Replace ENV_RAMSTAGE with ENV_PAYLOAD_LOADERSubrata Banik2019-06-241-1/+1
* soc/intel/icelake: Replace PCI device LPC to ESPI as per EDSSubrata Banik2019-06-131-7/+7
* src/soc/intel/skylake/bootblock: Add SPT C236 to PCH TableChristian Walter2019-06-081-1/+1
* soc/intel/common: Check bios_size and window_size after MIN operationJohn Zhao2019-05-291-0/+3
* src/include/device/pci_ids.h: Add Kabylake C236 DeviceChristian Walter2019-05-281-0/+1
* soc/skylake: Add missing PCH IDsMarius Genheimer2019-05-061-0/+5
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