coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	device/pciexp_device: Convert LTR non-snoop/snoop value into common macro	Subrata Banik	2019-03-27	1	-6/+2
*	{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()	Subrata Banik	2019-03-21	1	-10/+1
*	Fix 'unsigned int' to bare use of 'unsigned'	Subrata Banik	2019-03-19	1	-1/+1
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-1/+1
*	soc/intel/common: Include cometlake PCH IDs	Ronak Kanabar	2019-02-26	1	-0/+16
*	soc/intel/{common, skylake}: Make ASPM enabling as common PCH feature	Subrata Banik	2018-11-19	1	-0/+4
*	soc/intel/common: Include Icelake device IDs	Aamir Bohra	2018-11-07	1	-0/+16
*	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh	2018-10-17	1	-1/+25
*	soc/intel/common/block: Don't use device_t in ramstage	Elyes HAOUAS	2018-09-18	1	-1/+1
*	pci: Move inline PCI functions to pci_ops.h	Patrick Rudolph	2018-04-20	1	-0/+1
*	soc/intel/common/block: Add option to have subsystem_id in common pci driver	Subrata Banik	2017-12-13	1	-0/+10
*	soc/intel/common: Add Cannonlake pci ids for common	Lijian Zhao	2017-08-04	1	-0/+16
*	soc/intel/common: Add Intel PCIe common code	Aamir Bohra	2017-05-22	3	-0/+161