| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Clean up unused arch/early_variables.h header | Arthur Heymans | 2019-05-29 | 1 | -1/+0 |
| * | intel/common/block/scs: Add ability to send early CMD0, CMD1 | Bora Guvendik | 2019-05-23 | 3 | -0/+177 |
| * | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner | 2019-03-08 | 1 | -2/+2 |
| * | soc/intel/common: Include cometlake PCH IDs | Ronak Kanabar | 2019-02-26 | 1 | -0/+1 |
| * | soc/{amd,intel}: Remove needless '&' on function pointers | Elyes HAOUAS | 2019-01-23 | 1 | -4/+4 |
| * | soc/intel/common: Include Icelake device IDs | Aamir Bohra | 2018-11-07 | 1 | -0/+1 |
| * | soc/intel/cannonlake: Add new cannon lake PCH-H support | praveen hodagatta pranesh | 2018-10-17 | 1 | -0/+2 |
| * | src/soc: Get rid of whitespace before tab | Elyes HAOUAS | 2018-06-04 | 1 | -1/+1 |
| * | soc/intel/common/block: Add option to have subsystem_id in common pci driver | Subrata Banik | 2017-12-13 | 1 | -3/+4 |
| * | soc/intel/common: Add Cannonlake pci ids for common | Lijian Zhao | 2017-08-04 | 1 | -0/+1 |
| * | soc/intel/common/block: Add Intel common SCS code support | Bora Guvendik | 2017-06-16 | 3 | -0/+82 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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