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path: root/src/soc/intel/common/block/sram/sram.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/common: Add lunarlake device IDsAppukuttan V K2024-01-261-0/+1
* soc/intel/common: Add RPP-S PCI IDsJeremy Soller2023-05-231-0/+1
* tree: Drop Intel Ice Lake supportFelix Singer2023-01-191-1/+0
* soc/intel/common: Include Meteor Lake device IDsWonkyu Kim2022-03-091-0/+4
* src: Make PCI ID define names shorterFelix Singer2022-03-071-13/+13
* soc/intel/common: Add Crash Log and PMC SRAM PCI device IDsTim Wawrzynczak2022-02-101-4/+4
* soc/intel/common: Add TGL-H PCI IDsJeremy Soller2021-08-191-0/+1
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-221-0/+1
* soc/intel/common: Include Alder Lake device IDsSubrata Banik2020-08-051-0/+2
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-1/+1
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+1
* soc/intel/common: Add PCI device IDs for CMP-HGaggery Tsai2019-12-131-0/+1
* soc/intel/common: Add Jasperlake Device IDsrkanabar2019-12-101-0/+1
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+1
* soc/intel/common: Include cometlake PCH IDsRonak Kanabar2019-02-261-0/+1
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+1
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* compiler.h: add __weak macroAaron Durbin2018-04-241-1/+2
* soc/intel/common/block: Add option to have subsystem_id in common pci driverSubrata Banik2017-12-131-0/+1
* soc/intel/common: Add Intel SRAM common code supportV Sowmya2017-11-301-0/+58
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