index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
common
/
block
/
sram
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/commmon: Include Alder Lake device IDs
Varshit Pandya
2021-01-22
1
-0
/
+1
*
soc/intel/common: Include Alder Lake device IDs
Subrata Banik
2020-08-05
1
-0
/
+2
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
1
-12
/
+1
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
1
-2
/
+1
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-1
/
+0
*
soc/intel/common: Update Jasper Lake Device IDs
Meera Ravindranath
2020-02-25
1
-1
/
+1
*
soc/intel/common: Add Elkhartlake Device IDs
Tan, Lean Sheng
2020-01-22
1
-0
/
+1
*
soc/intel/common: Add PCI device IDs for CMP-H
Gaggery Tsai
2019-12-13
1
-0
/
+1
*
soc/intel/common: Add Jasperlake Device IDs
rkanabar
2019-12-10
1
-0
/
+1
*
soc/intel/common: Include Tigerlake device IDs
Ravi Sarawadi
2019-11-05
1
-0
/
+1
*
soc/intel/common: Include cometlake PCH IDs
Ronak Kanabar
2019-02-26
1
-0
/
+1
*
soc/intel/common: Include Icelake device IDs
Aamir Bohra
2018-11-07
1
-0
/
+1
*
Move compiler.h to commonlib
Nico Huber
2018-10-08
1
-1
/
+0
*
compiler.h: add __weak macro
Aaron Durbin
2018-04-24
1
-1
/
+2
*
soc/intel/common/block: Add option to have subsystem_id in common pci driver
Subrata Banik
2017-12-13
1
-0
/
+1
*
soc/intel/common: Add Intel SRAM common code support
V Sowmya
2017-11-30
3
-0
/
+63