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path: root/src/soc/intel/common/block/uart
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* soc/intel/common: Set controller state to active in uart initUsha P2019-08-211-3/+6
* soc/intel/common/block/uart: Update the UART PCI device referenceAamir Bohra2019-08-041-11/+18
* Revert "soc/intel/common: Set controller state to active in uart init"Christian Walter2019-07-291-6/+3
* soc/intel/common: Set controller state to active in uart initUsha P2019-07-241-3/+6
* soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber2019-06-031-5/+4
* soc/intel/common/uart: Correctly guard uart_platform_base()Nico Huber2019-06-031-1/+1
* soc/intel/common/uart: Only return valid UART baseNico Huber2019-06-031-2/+3
* soc/intel/common/uart: Drop dead call to soc_uart_set_legacy_mode()Nico Huber2019-06-031-4/+0
* src: include <assert.h> when appropriateElyes HAOUAS2019-04-231-1/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-5/+5
* soc/intel/common: Include cometlake PCH IDsRonak Kanabar2019-02-261-0/+3
* soc/{amd,intel}: Remove needless '&' on function pointersElyes HAOUAS2019-01-231-3/+3
* soc/intel: Clean mess around UART_DEBUGNico Huber2019-01-092-6/+17
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+3
* soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh2018-10-171-0/+3
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* soc/intel/common/block: Move common uart function to block/uartSubrata Banik2018-08-202-23/+116
* src: Get rid of device_tElyes HAOUAS2018-06-141-1/+5
* compiler.h: add __weak macroAaron Durbin2018-04-241-3/+4
* src/soc: Fix various typosJonathan Neuschäfer2018-02-201-1/+1
* soc/intel/skylake: Add Kabylake PCH H device ID'sV Sowmya2018-02-071-0/+3
* soc/intel/skylake: Clean up the skylake PCH H device ID macrosV Sowmya2018-01-251-3/+3
* soc/intel/common/block: Add option to have subsystem_id in common pci driverSubrata Banik2017-12-131-0/+1
* soc/intel/common/uart: Add support for enabling UART debug controller on resumeFurquan Shaikh2017-08-102-3/+95
* soc/intel/common/uart: Refactor uart_common_initFurquan Shaikh2017-08-102-6/+24
* soc/intel/common: Add Cannonlake pci ids for commonLijian Zhao2017-08-041-0/+3
* Update files with no newline at the endMartin Roth2017-07-241-1/+1
* soc/intel/common/block/uart: Add GLK UART pci idsHannah Williams2017-05-221-0/+5
* soc/intel/common: Add PCI configuration code for UARTAamir Bohra2017-05-092-2/+38
* soc/intel/common/block: Add Intel common UART codeAamir Bohra2017-04-113-0/+41
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