summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/common
Commit message (Expand)AuthorAgeFilesLines
* soc/intel: Drop CID1 from GNVSKyösti Mälkki2021-02-082-2/+2
* acpi: Fix BERT size_t printf format errorBenjamin Doron2021-02-071-1/+1
* intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPIFurquan Shaikh2021-02-061-1/+1
* intel: Drop FSP_PEIM_TO_PEIM_INTERFACEFurquan Shaikh2021-02-061-2/+1
* acpi: Add support for reporting CrashLog in BERT tableFrancois Toguo2021-02-041-0/+11
* src: Remove unused <bootstate.h>Elyes HAOUAS2021-02-042-2/+1
* pci_ids/intel: Add missing CFL-S GT1 IGD IDsNico Huber2021-02-031-0/+2
* pci_ids/intel: Correct 0x3e96, it's a CFL-S partNico Huber2021-02-031-1/+1
* soc/intel: Fix compilation on x86_64Patrick Rudolph2021-02-031-4/+4
* soc/intel/common/sata: Add support for Cannon Lake SATA (HALO)Erik van den Bogaert2021-02-011-0/+1
* soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph2021-02-013-24/+5
* drivers/intel/fsp2_0: Use coreboot postcar with FSP-TArthur Heymans2021-02-011-0/+4
* soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig optionsAngel Pons2021-01-303-23/+9
* soc/amd,intel: Drop leftover GNVS includesKyösti Mälkki2021-01-302-3/+0
* soc/intel/common/block: Create PCIE related macrosSubrata Banik2021-01-301-8/+48
* soc/intel: Remove duplicate call to acpi_wake_source()Kyösti Mälkki2021-01-295-79/+4
* device/Kconfig: Declare MMCONF symbols' type onceAngel Pons2021-01-291-1/+0
* soc/intel: Remove selection of ME_REGION_ALLOW_CPU_READ_ACCESSSridhar Siricilla2021-01-281-1/+0
* ACPI: Separate ChromeOS NVS in ASLKyösti Mälkki2021-01-281-4/+0
* ACPI: Declare GNVS variables globallyKyösti Mälkki2021-01-281-10/+0
* soc/intel: Refactor acpi_wake_source()Kyösti Mälkki2021-01-282-29/+37
* soc/intel: Refactor fill_acpi_wake()Kyösti Mälkki2021-01-283-12/+17
* soc/intel: Move c-state resource defineMarc Jones2021-01-261-0/+10
* sb,soc/intel: Remove no-op APMC for C-state and P-stateKyösti Mälkki2021-01-251-14/+0
* cpu/x86/smm: Use common APMC loggingKyösti Mälkki2021-01-251-7/+1
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-253-6/+1
* soc/intel/lpc_lib: mirror LPC registers to DMI when requiredMichael Niewöhner2021-01-254-6/+31
* soc/intel/common: Add support for populating meminit dataFurquan Shaikh2021-01-254-0/+362
* soc/intel/lpc_lib: drop dead codeMichael Niewöhner2021-01-242-10/+0
* ACPI: Add helpers for CBMEM_ID_POWER_STATEKyösti Mälkki2021-01-232-3/+4
* soc/intel/apl: drop LPC pad configuration codeMichael Niewöhner2021-01-231-2/+0
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-2217-0/+85
* soc/intel/common/pcie_rp.h: Fix comment styleFurquan Shaikh2021-01-211-14/+14
* soc/intel/common/graphics: Add new Kconfig SOC_INTEL_DISABLE_IGDSubrata Banik2021-01-211-0/+9
* soc/intel: fix indentation in intelblocks/lpc_lib.hMichael Niewöhner2021-01-201-20/+20
* soc/intel/*: drop broken LPC mmio codeMichael Niewöhner2021-01-203-39/+0
* ACPI GNVS: Drop most dev_count_cpu()Kyösti Mälkki2021-01-202-2/+2
* ACPI: Refactor ChromeOS specific ACPI GNVSKyösti Mälkki2021-01-181-8/+0
* soc/intel/common/block/include/intelblocks/pmc_ipc.h: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* soc/intel/common/block/itss/itss.c: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* soc/intel/common: Move L1_substates_control to pcie_rp.hEric Lai2021-01-181-0/+8
* soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguousFurquan Shaikh2021-01-183-10/+26
* build system: Structure and serialize INTERMEDIATEPatrick Georgi2021-01-141-4/+1
* ACPI: Have single call-site for acpi_inject_nvsa()Kyösti Mälkki2021-01-132-6/+0
* ACPI: Add common acpi_fill_gnvs()Kyösti Mälkki2021-01-131-7/+0
* soc/intel: rename uart_max_indexMichael Niewöhner2021-01-121-2/+2
* soc/intel/common/pcie: Add helper function for getting mask of enabled portsFurquan Shaikh2021-01-123-0/+58
* soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik2021-01-121-1/+2
* acpi,soc/intel/common: add support for Intel Low Power Idle TableMichael Niewöhner2021-01-114-0/+74
* soc/intel/common/uart: Use simple(_s_) variants of PCI functionsFurquan Shaikh2021-01-111-41/+34
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-02 19:44:05 +0000