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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
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Coreboot firmware sources
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path:
root
/
src
/
soc
/
intel
/
denverton_ns
/
uart.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
1
-12
/
+1
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
1
-2
/
+1
*
Drop unnecessary DEVICE_NOOP entries
Nico Huber
2020-04-10
1
-1
/
+0
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-1
/
+0
*
soc/intel/denverton/uart.c: Clean up code
Felix Singer
2020-03-02
1
-6
/
+1
*
soc/intel/denverton: Move PCI IDs to pci_ids.h
Felix Singer
2020-03-02
1
-1
/
+1
*
soc/intel: Replace uses of dev_find_slot()
Kyösti Mälkki
2019-07-04
1
-1
/
+1
*
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-08
1
-2
/
+2
*
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-03-01
1
-0
/
+1
*
soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces
Julien Viard de Galbert
2018-03-09
1
-0
/
+39
*
soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC
Mariusz Szafranski
2017-09-05
1
-0
/
+53