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path: root/src/soc/intel/elkhartlake/romstage
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* soc/intel: Rename heci_init to cse_initSubrata Banik2022-06-041-1/+1
* soc/intel/elkhartlake: Enable SMBus depending on dev stateAngel Pons2022-05-171-2/+1
* soc/intel/elkhartlake: Introduce Intel PSELean Sheng Tan2022-01-251-1/+1
* soc/intel: Remove unused <string.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel/elkhartlake: Disable Intel PSE by defaultLean Sheng Tan2021-11-241-0/+2
* soc/intel/{ehl,jsl}: make use of Kconfig options for PRMRR sizeMichael Niewöhner2021-09-171-1/+2
* soc/intel/elkhartlake: Expose In-Band ECC config to mainboardWerner Zeh2021-06-211-0/+15
* soc/intel/elkhartlake: Make use of FSP_ARRAY_LOAD macroLean Sheng Tan2021-06-181-28/+6
* soc/intel/elkhartlake: Make use of is_devfn_enabled()Subrata Banik2021-06-161-7/+3
* soc/intel/elkhartlake: Update FSP-M UPD related configsTan, Lean Sheng2021-05-301-5/+124
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-013-13/+3
* soc/intel/elkhartlake: Remove unused <string.h>Elyes HAOUAS2021-02-161-1/+0
* soc/intel: Remove unused <console/console.h>Elyes HAOUAS2021-02-151-1/+0
* soc/intel/elkhartlake: Config PlatformDebugConsentFrans Hendriks2021-02-011-0/+3
* soc/intel/elkhartlake: Fix EHL mainboard build fail errorsTan, Lean Sheng2020-12-102-2/+2
* soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()Nick Vaccaro2020-10-051-6/+0
* mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro2020-10-051-5/+8
* soc/intel/elkhartlake: add __weak to mainboard_get_dram_part_num()Nick Vaccaro2020-10-051-1/+1
* soc/intel/elkhartlake/romstage: Do initial SoC commit till romstageTan, Lean Sheng2020-08-315-0/+220
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