summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/fsp_baytrail/fsp
Commit message (Expand)AuthorAgeFilesLines
* intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki2019-08-211-11/+2
* fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inchcl-coreboot2019-08-081-1/+1
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-1/+1
* drivers/intel/fsp1_0: Deduplicate codePatrick Rudolph2019-03-161-12/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* device: Use pcidev_path_on_root()Kyösti Mälkki2019-01-061-1/+1
* src: Remove unneeded whitespaceElyes HAOUAS2018-10-231-2/+2
* intel: Use CF9 reset (part 1)Patrick Rudolph2018-10-221-3/+3
* src/soc: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS2018-07-091-1/+1
* lib: provide clearer devicetree semanticsAaron Durbin2017-04-251-2/+2
* intel/fsp_baytrail: Fix assignment of PcdeMMCBootModeDavid Imhoff2016-11-161-3/+4
* intel/fsp_baytrail: Always log PcdEnableLpe and PcdeMMCBootModeDavid Imhoff2016-11-161-0/+7
* soc/intel/fsp_baytrail: use common Intel ACPI hardware definitionsAaron Durbin2016-07-151-1/+1
* soc/fsp_baytrail: Add support for FSP MR 005Ben Gardner2016-02-101-0/+2
* src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig filesMartin Roth2016-01-291-0/+0
* intel/fsp_baytrail: rename include folder baytrail to include/socBen Gardner2015-12-161-7/+7
* fsp_baytrail: Add missing newline to eMMC Mode logBen Gardner2015-12-061-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-314-16/+0
* intel/fsp_baytrail: Fix logging of ISPEnable optionDavid Imhoff2015-10-231-2/+2
* intel/fsp_baytrail: Support Baytrail FSP Gold4 releaseYork Yang2015-07-211-1/+6
* Remove address from GPLv2 headersPatrick Georgi2015-05-214-4/+4
* fsp: Move fsp to fsp1_0Marc Jones2015-04-242-2/+2
* fsp_baytrail: Get FSP reserved memory from the FSP HOB listMartin Roth2015-02-091-2/+0
* FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth2015-02-061-0/+2
* fsp_baytrail: Kconfig update for Gold 3 FSPMartin Roth2014-12-051-1/+1
* fsp_baytrail: remove register option for TSEG sizeMartin Roth2014-12-051-2/+2
* fsp_baytrail: update printk to use FSP_INFO_LEVELMartin Roth2014-12-051-13/+13
* fsp_baytrail: update for UPD_DEVICE_CHECK macroMartin Roth2014-12-051-132/+52
* fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macroMartin Roth2014-12-052-84/+65
* fsp_baytrail: update for UPD_SPD_CHECK macroMartin Roth2014-12-051-11/+2
* fsp_baytrail: update to add the UPD_DEFAULT_CHECK macroMartin Roth2014-12-051-50/+18
* Mark non-executable files non-executablePatrick Georgi2014-12-012-0/+0
* intel/fsp_baytrail: add Gold3 FSP supportYork Yang2014-11-212-3/+130
* fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.hMartin Roth2014-11-191-25/+25
* x86 romstage: Move stack just below RAMTOPKyösti Mälkki2014-10-191-1/+0
* intel/fsp_baytrail: Add S3 suspend/resume SupportMohan D'Costa2014-09-291-2/+31
* soc,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-171-1/+0
* fsp_baytrail: Minor Kconfig updatesMartin Roth2014-06-231-2/+2
* fsp_baytrail: Add the default FSP locationMartin Roth2014-06-181-0/+10
* fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOTMartin Roth2014-06-131-1/+1
* fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chipMartin Roth2014-05-294-0/+437