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path: root/src/soc/intel/icelake
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* tree: Drop Intel Ice Lake supportFelix Singer2023-01-1965-5686/+0
* soc/intel/icelake: Fix incorrect `prev_sleep_state` issueSubrata Banik2023-01-181-1/+1
* tree/acpi: Replace constant "Zero" with actual numberFelix Singer2022-12-272-3/+3
* {acpi,arch,soc}/acpi: Replace constant "One" with actual numberFelix Singer2022-12-271-5/+5
* tree: Replace And(a,b,c) with ASL 2.0 syntaxFelix Singer2022-12-231-2/+2
* tree: Replace Or(a,b,c) with ASL 2.0 syntaxFelix Singer2022-12-231-2/+2
* tree: Replace LAnd(a,b) with ASL 2.0 syntaxFelix Singer2022-12-191-2/+1
* treewide: Remove unused 'include <arch/io.h>'Elyes Haouas2022-12-151-1/+0
* soc/intel/icelake/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer2022-12-142-11/+11
* soc/intel/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntaxFelix Singer2022-12-121-2/+1
* soc/intel/icelake/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer2022-12-121-4/+4
* sb,soc/intel: Address TCO SECOND_TO_STS name collisionKyösti Mälkki2022-11-281-1/+1
* src/soc/intel: Remove unnecessary space after castsElyes Haouas2022-11-263-3/+3
* soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fillDavid Milosevic2022-11-171-1/+2
* soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>Elyes Haouas2022-11-041-2/+2
* soc: Add SPDX license headers to MakefilesMartin Roth2022-10-311-0/+1
* payloads/edk2: Disable the CPU Timer Lib unless supportedSean Rhodes2022-10-221-0/+1
* treewide: Use 'fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk'Elyes Haouas2022-10-121-1/+1
* acpi/acpi_pm.c: refactor acpi_pm_state_for_* functionsFabio Aiuto2022-09-271-1/+1
* soc/intel/spi: Move BIOS flash SPI controllers to fast SPI driverWerner Zeh2022-09-221-2/+0
* soc/intel/common/pch: Decouple CLIENT from BASEAngel Pons2022-07-201-1/+1
* soc/intel: Rename heci_init to cse_initSubrata Banik2022-06-041-1/+1
* soc/intel/common/cpu: Use SoC overrides to set CPU privilege levelSubrata Banik2022-06-021-0/+9
* soc/intel/*: Use SSDT to pass A4GB and A4GSArthur Heymans2022-05-162-5/+4
* soc/{amd/stoneyridge,intel}: Don't select VBOOT_SEPARATE_VERSTAGEArthur Heymans2022-04-291-1/+0
* soc/intel: clean up dmi driver codeWonkyu Kim2022-04-201-6/+0
* soc/intel: Move `pmc_clear_pmcon_sts()` into IA common codeSubrata Banik2022-03-293-17/+1
* src: Make PCI ID define names shorterFelix Singer2022-03-071-26/+26
* arch/x86: factor out and commonize HPET_BASE_ADDRESS definitionFelix Held2022-02-251-2/+0
* drivers/fsp/fsp2_0: Rework FSP Notify Phase API configsSubrata Banik2022-02-181-1/+4
* soc/intel/*/pmc: Add `finalize` operation for pmcSubrata Banik2022-02-151-0/+9
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-3/+0
* soc/intel/common/cse: Rework heci_disable functionSubrata Banik2022-02-021-1/+1
* soc/intel/icl: Rework on HECI1 disable configsSubrata Banik2022-01-213-10/+5
* soc/intel/common/cpu: Use SoC overrides to get CPU privilege levelSubrata Banik2022-01-192-0/+10
* src/soc/intel: Remove unused <console/console.h>Elyes HAOUAS2022-01-101-1/+0
* soc/intel/{icl,tgl,jsl,ehl}: enable ACPI CPPC entriesMichael Niewöhner2022-01-091-0/+1
* soc/intel: Remove unused <string.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel/common/thermal: Refactor thermal block to improve reusabilitySubrata Banik2021-11-251-1/+1
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-102-2/+2
* soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL`Michael Niewöhner2021-11-081-1/+0
* soc/intel/icelake: select SOC_INTEL_COMMON_BLOCK_ACPI_GPIOArthur Heymans2021-10-291-0/+1
* cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held2021-10-261-1/+0
* cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held2021-10-251-1/+0
* arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki2021-10-221-1/+0
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-221-2/+2
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-211-1/+2
* soc/intel: Constify `soc_get_cstate_map()`Angel Pons2021-10-191-1/+1
* soc/intel/*/acpi.c: Don't copy structs with `memcpy()`Angel Pons2021-10-191-1/+1
* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-171-0/+9