coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	arch/x86: Flip HAVE_MONOTONIC_TIMER default	Kyösti Mälkki	2019-07-09	1	-1/+0
*	cpu/x86: Flip SMM_TSEG default	Kyösti Mälkki	2019-07-09	1	-1/+0
*	soc/intel/{cml, whl}: Add option to skip HECI disable in SMM	Subrata Banik	2019-06-13	1	-0/+1
*	soc/intel: Replace UART_BASE() and friends with a Kconfig	Nico Huber	2019-06-03	1	-0/+5
*	soc/intel/icelake: Select FSP_M_XIP	Subrata Banik	2019-05-02	1	-0/+1
*	vboot: refactor OPROM code	Joel Kitching	2019-04-30	1	-1/+1
*	soc/intel/icelake: Enable support for FSP 2.1 specification	Subrata Banik	2019-03-19	1	-2/+1
*	Untangle CBFS microcode updates	Nico Huber	2019-01-10	1	-0/+1
*	soc/intel: Clean mess around UART_DEBUG	Nico Huber	2019-01-09	1	-17/+0
*	soc/intel/icelake: Increase bootblock size	Subrata Banik	2019-01-08	1	-1/+1
*	soc/intel/icelake: Create macros for FSP consumption	Subrata Banik	2018-11-22	1	-0/+8
*	soc/intel/icelake: Allow coreboot to reserve stack for fsp	Aamir Bohra	2018-11-02	1	-0/+2
*	soc/intel/*: Make FSP header path user configurable	Patrick Georgi	2018-10-27	1	-1/+1
*	soc/intel/icelake: Do initial SoC commit	Aamir Bohra	2018-10-26	1	-0/+211