coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel/jasperlake/bootblock: Report missing Jasper Lake SKU	Michał Żygowski	2024-02-17	1	-0/+1
*	soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>	Elyes Haouas	2022-11-04	1	-2/+2
*	src: Make PCI ID define names shorter	Felix Singer	2022-03-07	1	-10/+10
*	soc/intel/jasperlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik	2021-07-17	1	-1/+1
*	src/soc/intel/{jasperlake,xeon_sp}: Remove unused <string.h>	Elyes HAOUAS	2021-02-16	1	-1/+0
*	soc/intel/jasperlake: Add IGD, MCH Device ID	Krishna Prasad Bhat	2020-09-29	1	-0/+2
*	soc/intel/jasperlake: Add IGD Device ID	Krishna Prasad Bhat	2020-08-17	1	-0/+1
*	{nb,soc}/intel: Use get_current_microcode_rev() for ucode version	Subrata Banik	2020-08-05	1	-9/+2
*	soc/intel/jasperlake: Clean up report_cpu_info() function	Usha P	2020-07-29	1	-24/+4
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/intel/jasperlake: Add new MCH device ids	Maulik V Vaghela	2020-04-28	1	-1/+4
*	soc/intel/jasperlake: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-13/+2
*	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra	2020-03-28	1	-60/+0
*	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra	2020-03-28	1	-0/+246