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path: root/src/soc/intel/jasperlake/fsp_params.c
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* soc/intel/jasperlake: Add configs for USB 3.1 Gen2 EV settingsChia-Ling Hou2023-08-101-0/+21
* soc/intel/jasperlake: Add PsysPmax configChia-Ling Hou2023-05-191-0/+7
* src/soc/intel: Remove unnecessary space after castsElyes Haouas2022-11-261-1/+1
* soc/intel/jasperlake: Add CdClock frequency configSimon Yang2022-01-011-0/+9
* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-171-0/+9
* drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling methodSubrata Banik2021-09-161-6/+0
* soc/intel/jasperlake: Lock PAM registers in finalizeTim Wawrzynczak2021-09-051-0/+1
* soc/intel/jasperlake: Clean up FSP chipset lockdown configurationFelix Singer2021-08-121-11/+5
* soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes2021-08-031-1/+4
* soc/intel/jsl: Add disable_external_bypass_vr configSimon Yang2021-07-281-0/+6
* soc/intel/jasperlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-171-1/+0
* soc/intel: Refactor `xdci_can_enable()` functionAngel Pons2021-07-011-4/+1
* soc/intel/jasperlake: Send End-of-Post message to CSETim Wawrzynczak2021-06-301-5/+5
* soc/intel/jasperlake: Use devfn_disable() function for XDCISubrata Banik2021-06-231-9/+3
* soc/intel/jasperlake: Make use of FSP_ARRAY_LOAD macroLean Sheng Tan2021-06-181-31/+7
* soc/intel/jasperlake: Make use of is_devfn_enabled() functionSubrata Banik2021-06-161-11/+5
* soc/intel: Drop unused lpss functionsFurquan Shaikh2021-06-071-22/+0
* soc/intel/jasperlake: Update acoustic noise related parametersMaulik V Vaghela2021-01-081-6/+13
* soc/intel/jasperlake: Add Acoustic noise mitigation configurationMaulik V Vaghela2020-12-051-0/+8
* soc/intel/jasperlake: Enable Intel FIVR RFI settingsMaulik V Vaghela2020-11-091-0/+4
* Revert "soc/intel/jasperlake: Allow mainboard to override chip configuration"Karthikeyan Ramasubramanian2020-10-261-8/+0
* soc/intel: Configure PAVP at compile-timeBenjamin Doron2020-10-121-0/+2
* soc/intel/jasperlake: Allow mainboard to override chip configurationKarthikeyan Ramasubramanian2020-10-121-0/+8
* soc/intel/jasperlake: Add VR Configuration settingsMeera Ravindranath2020-10-081-0/+4
* Revert "soc/intel/jasperlake: Disable PAVP UPD"Nico Huber2020-10-081-3/+0
* soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFNSumeet R Pawnikar2020-09-221-1/+3
* soc/intel/jsl: Use the common code to set the PchPmPwrCycDurV Sowmya2020-09-211-125/+1
* soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by defaultMichael Niewöhner2020-09-061-4/+10
* soc/intel/jasperlake: Disable multiphase SI initRonak Kanabar2020-08-251-0/+6
* soc/intel/jasperlake: Add FSP UPDs for minimum assertion widthsV Sowmya2020-08-171-0/+141
* soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecatedSubrata Banik2020-08-011-5/+1
* soc/intel/jasperlake: Simplify is-device-enabled checksFelix Singer2020-07-281-19/+8
* src: Update bare access to BOOL CONFIG_ vals to CONFIG()Martin Roth2020-07-261-2/+2
* jasperlake: enable tcc_offset functionalitySumeet R Pawnikar2020-06-301-0/+3
* soc/intel/jasperlake: Disable PAVP UPDRonak Kanabar2020-05-281-0/+3
* soc/intel/jasperlake: Use coreboot lock down configAamir Bohra2020-05-281-2/+13
* soc/intel/jasperlake: Add SATA related UPDs configurationRonak Kanabar2020-05-121-0/+20
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/jasperlake: Enable end of post support in FSPAamir Bohra2020-05-111-0/+15
* soc/intel/jasperlake: Allow SD card power enable polarity configurationRonak Kanabar2020-05-051-2/+4
* soc/intel/jasperlake: Fill PcieRpClkReqDetect from devicetreeMeera Ravindranath2020-05-011-0/+4
* soc/intel/jasperlake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper LakeAamir Bohra2020-03-281-0/+191
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