coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel/jasperlake: Set GPE_STS and GPE_EN register bases	Jonathon Hall	2023-09-27	1	-0/+10
*	soc/intel/jasperlake: Use common gpio.h include	Dinesh Gehlot	2023-01-18	1	-1/+1
*	soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers	Michael Niewöhner	2021-09-23	1	-0/+8
*	soc/intel/jasperlake: Add offsets for pad locking	Aseda Aboagye	2021-06-19	1	-0/+1
*	soc/intel/jasperlake: Correct GPIO pad sequence for community pad group	Maulik V Vaghela	2020-11-09	1	-14/+11
*	soc/intel/jasperlake: Update reserved GPIO names in gpio_soc_defs.h	Maulik V Vaghela	2020-11-09	1	-18/+17
*	src/soc/intel: Drop unneeded empty lines	Elyes HAOUAS	2020-09-21	1	-2/+0
*	soc/intel/jasperlake: Fix PMC_GPE_DW mapping	Meera Ravindranath	2020-08-18	1	-3/+4
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi	2020-05-06	1	-12/+1
*	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi	2020-05-06	1	-2/+1
*	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra	2020-03-28	1	-0/+210