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path: root/src/soc/intel/jasperlake
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* src/soc/intel/jasperlake/spd: Update SPDsTyler Wang2021-09-141-1/+5
* soc/intel/jasperlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak2021-09-103-3/+11
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-081-1/+0
* soc/intel/jasperlake: Utilize vbt data size Kconfig optionSeunghwan Kim2021-09-051-0/+4
* soc/intel/jasperlake: Lock PAM registers in finalizeTim Wawrzynczak2021-09-052-0/+10
* soc/intel/jasperlake: Clean up FSP chipset lockdown configurationFelix Singer2021-08-121-11/+5
* Move post_codes.h to commonlib/console/Ricardo Quesada2021-08-042-4/+4
* soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes2021-08-031-1/+4
* Revert "soc/intel/jasperlake: Enable support to program VCCIO selection"Karthikeyan Ramasubramanian2021-07-281-1/+0
* soc/intel/jsl: Add disable_external_bypass_vr configSimon Yang2021-07-282-0/+18
* soc/intel/jasperlake: add pcie modphy settingsJamie Chen2021-07-283-0/+62
* src/*: Specify type of `CBFS_SIZE` onceAngel Pons2021-07-261-1/+0
* soc/intel/jasperlake: Enable support to program VCCIO selectionKarthikeyan Ramasubramanian2021-07-261-0/+1
* soc/intel/jasperlake: Set xHCI LFPS period sampling off timeBen Kao2021-07-262-1/+47
* soc/intel/jasperlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-172-2/+1
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* soc/intel: Refactor `xdci_can_enable()` functionAngel Pons2021-07-011-4/+1
* soc/intel/jasperlake: Send End-of-Post message to CSETim Wawrzynczak2021-06-302-5/+6
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* soc/intel: Drop casts around `soc_read_pmc_base()`Angel Pons2021-06-281-2/+1
* soc/intel/jasperlake: Select DISPLAY_FSP_VERSION_INFO_2Ronak Kanabar2021-06-261-1/+1
* soc/intel/jasperlake: Use devfn_disable() function for XDCISubrata Banik2021-06-231-9/+3
* soc/intel/jasperlake: Add offsets for pad lockingAseda Aboagye2021-06-192-0/+2
* soc/intel/jasperlake: Make use of FSP_ARRAY_LOAD macroLean Sheng Tan2021-06-182-54/+12
* soc/intel/jasperlake: Make use of is_devfn_enabled() functionSubrata Banik2021-06-163-24/+11
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* soc/intel: Drop unused lpss functionsFurquan Shaikh2021-06-071-22/+0
* util/spd_tools/lp4x: Add new memory part to to global memory definitionDtrain Hsu2021-05-224-0/+107
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-181-1/+0
* src: Match array format in function declarations and definitionsPatrick Georgi2021-05-131-1/+1
* soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXITKane Chen2021-05-072-2/+12
* soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmasterKane Chen2021-05-071-0/+8
* soc/intel/*: Update data types for variables holding PCH_DEVFN_* macrosTim Wawrzynczak2021-05-031-1/+1
* device: Switch pci_dev_is_wake_source to take pci_devfn_tTim Wawrzynczak2021-05-031-10/+4
* soc/intel/jasperlake: Remove TCSS setting from the DMAR tableJohn Zhao2021-04-233-36/+0
* soc/intel: Replace open-coded buffer length calculationAngel Pons2021-04-211-4/+2
* soc/intel: Fix typo in commentAngel Pons2021-04-211-1/+1
* soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRCRizwan Qureshi2021-04-212-3/+3
* soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.cAngel Pons2021-04-213-18/+17
* dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak2021-04-132-0/+19
* soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPDAngel Pons2021-04-081-1/+1
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-272-1/+7
* soc/intel: Drop unused `GPIO_NUM_GROUPS` macroAngel Pons2021-03-201-1/+0
* spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()Julius Werner2021-03-171-6/+4
* soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner2021-03-121-34/+6
* soc/intel: Factor out common smmrelocate.cAngel Pons2021-03-033-251/+1
* soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons2021-03-031-4/+1
* soc/intel: Backport SMRR locking supportAngel Pons2021-03-031-0/+17
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-014-21/+2
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-014-14/+3
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