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path: root/src/soc/intel/meteorlake
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* soc/intel/meteorlake: Enable PCIE_CLOCK_CONTROL_THROUGH_P2SBKane Chen2023-07-182-0/+8
* soc/intel/meteorlake: Include IOE PCR register accessSubrata Banik2023-07-181-1/+5
* soc/intel/meteorlake: Add IOE P2SB Base AddressSubrata Banik2023-07-182-1/+7
* soc/intel: Rename pcr.asl to pch_pcr.aslSubrata Banik2023-07-131-1/+1
* soc/intel/*/pmc.c: Use newer function for resource declarationsArthur Heymans2023-07-121-2/+1
* soc/intel/meteorlake: Set TCC to 90°CSumeet Pawnikar2023-07-051-0/+3
* soc/intel/meteorlake: add power limits for 28W SKUSumeet Pawnikar2023-07-051-0/+6
* soc/intel/meteoerlake: add support for 28W SKUSumeet Pawnikar2023-07-051-1/+4
* soc/intel/meteorlake: remove unused tcss mailbox codeKane Chen2023-06-291-124/+1
* soc/intel/meteorlake: Add QS(C0) stepping CPU IDMusse Abdullahi2023-06-291-0/+1
* soc/intel/meteorlake: Add support for crashlogPratikkumar Prajapati2023-06-264-0/+524
* commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious2023-06-232-2/+2
* soc/intel/meteorlake: Rename shared SRAM aliasesPratikkumar Prajapati2023-06-231-2/+2
* meteorlake: Rename `SOC_INTEL_METEORLAKE_U_P` as per latest EDSSubrata Banik2023-06-212-5/+9
* soc/intel/meteorlake: Update tcss_usb3 aliasEric Lai2023-06-173-6/+6
* soc/intel/meteorlake: select UDK_202302_BINDING KconfigRonak Kanabar2023-06-161-1/+1
* soc/intel/meteorlake: Disable ACPI PM timer using IOE.PMCSubrata Banik2023-06-164-1/+14
* soc/intel: Add max memory speed into dimm infoEric Lai2023-06-151-1/+2
* soc/intel/meteorlake: Fill PCI SSID parametersKapil Porwal2023-06-061-0/+67
* soc/intel/meteorlake: Apply PCIe RP mask based on SoC typeSubrata Banik2023-06-041-3/+12
* soc/intel/meteorlake: Introduce different SoC flavors of Meteor LakeSubrata Banik2023-06-041-1/+17
* soc/intel/meteorlake: Hook up UPD PchHdaSdiEnableRonak Kanabar2023-06-042-0/+7
* soc/intel/meteorlake: Hook up SaGvFreq, SaGvGear updsBora Guvendik2023-05-262-0/+19
* soc/intel/mtl/acpi/xhci: Add clock gating supportJeremy Compostella2023-05-252-2/+5
* soc/intel/meteorlake: Enable Key LockerPratikkumar Prajapati2023-05-251-0/+1
* soc/intel/meteorlake: Set SaGv work points as enum macroSubrata Banik2023-05-252-0/+22
* soc/intel/meteorlake: Add CPU PortID for GPIO CommunityMarx Wang2023-05-241-0/+5
* soc/intel/meteorlake: Add `.final` to check FSP reset pending requestSubrata Banik2023-05-211-0/+17
* soc/intel/meteorlake: Add igd deviceWon Chung2023-05-191-0/+1
* soc/intel/meteorlake: Handle FSP logo paramsSubrata Banik2023-05-171-0/+7
* soc/intel/meteorlake: Increase pcie snoop/non-snoop latencyRavi Sarawadi2023-05-111-0/+12
* soc/intel/meteorlake: Apply large cbmem buffer size for FSP debugSubrata Banik2023-05-081-2/+2
* src/soc/intel: Document meaning of variablesMaximilian Brune2023-05-051-2/+2
* soc/intel/meteoerlake: set power limits dynamicallySumeet R Pawnikar2023-04-223-43/+61
* mb/google/rex: Enable asynchronous End-Of-PostSubrata Banik2023-04-221-1/+1
* soc/intel/meteorlake: Don't offer D3Cold when it's disabledSean Rhodes2023-04-214-0/+48
* soc/intel/meteorlake: Add VPU into the DMAR SATC tablezhaojohn2023-04-211-0/+2
* soc/intel/(adl, cmn, mtl): Refactor cse_fw_sync() functionSubrata Banik2023-04-211-4/+1
* soc/intel/meteorlake: Send CSE EOP Async CMD earlySubrata Banik2023-04-201-0/+17
* soc/intel/meteorlake: Replace TcssD3ColdDisable with D3COLD_SUPPORTSean Rhodes2023-04-202-3/+1
* soc/intel/meteorlake: Drop FSP CPU feature programming for ChromeOSSubrata Banik2023-04-201-1/+1
* soc/intel/meteorlake: Add B0 stepping CPU IDMusse Abdullahi2023-04-151-0/+1
* soc/intel/meteorlake: Replace assert with error messageKapil Porwal2023-04-141-6/+13
* soc/intel/meteorlake: Hook up UPD CnviWifiCoreKapil Porwal2023-04-133-0/+9
* soc/intel/meteorlake: Perform feature control lockSubrata Banik2023-04-061-0/+3
* soc/intel/meteorlake: Enable VMX using coreboot CPU feature programSubrata Banik2023-04-062-0/+5
* soc/intel/meteorlake: Set AES-NI LockSubrata Banik2023-04-061-0/+2
* soc/intel/meteorlake: Disable 3-strike errorSubrata Banik2023-04-061-0/+5
* soc/intel/meteorlake: Allow to drop redundant CPU feature programmingSubrata Banik2023-04-061-0/+21
* soc/intel/meteorlake: Inject CSE TS into CBMEM timestamp tableBora Guvendik2023-04-043-0/+34
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