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path: root/src/soc/intel/skylake/bootblock
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* soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik2020-12-091-2/+1
* soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh2020-11-291-1/+6
* {nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik2020-08-051-7/+2
* soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS2020-06-021-1/+0
* {icelake,jasperlake,skylake,tigerlake}/bootblock.c: Clean up includesElyes HAOUAS2020-06-021-1/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-114-4/+0
* soc/intel/skylake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-064-52/+8
* soc: Remove copyright noticesPatrick Georgi2020-03-184-7/+0
* soc/intel/skylake: Control fixed IO decode from devicetreeWim Vervoorn2020-03-181-3/+10
* soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn2020-02-171-3/+3
* soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn2020-02-171-0/+6
* src: Remove unused include <string.h>Elyes HAOUAS2019-12-261-1/+0
* soc/intel/skylake: Rename pch_init() codeUsha P2019-12-262-2/+2
* soc/intel/skylake: Clean up report_cpu_info() functionUsha P2019-11-271-20/+4
* soc/intel/skylake: Refactor pch_early_init() codeUsha P2019-11-222-14/+3
* soc/intel/skylake: drop support for FSP 1.1Michael Niewöhner2019-10-261-4/+0
* src/pci_ids: add missing Intel Kaby Lake iGPU PCIIDsMaxim Polyakov2019-10-041-6/+16
* src/pci_ids: add missing Intel Skylake iGPU PCIIDsMaxim Polyakov2019-10-041-2/+10
* pci_ids: rename PCI_DEVICE_ID_INTEL_SKL_ID_HMaxim Polyakov2019-09-301-1/+1
* soc/intel/skylake: Add Lewisburg family PCH supportMaxim Polyakov2019-09-061-0/+13
* soc/intel/skylake: Remove duplicated PCI IdMaxim Polyakov2019-08-301-2/+1
* lib/bootblock: Add simplified entry with basetimeKyösti Mälkki2019-08-261-1/+1
* soc/intel/skl: Add C232 chipset and reorder IDsFelix Singer2019-07-311-2/+3
* src/soc/intel/skylake/bootblock: Add SPT C236 to PCH TableChristian Walter2019-06-081-0/+1
* soc/intel: Add some missing MCH PCIe IDsKeno Fischer2019-06-071-0/+3
* soc/intel/skylake: Add PCI Id for Kabylake DTChristian Walter2019-05-231-0/+1
* soc/skylake: Add missing PCH IDsMarius Genheimer2019-05-061-0/+5
* soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS2019-04-261-1/+2
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-082-5/+5
* soc/intel/skylake: Add H110 PCH seriesMaxim Polyakov2019-03-061-0/+1
* soc/intel/skylake: Add new Northbridge and IGD IDsMaxim Polyakov2019-03-061-0/+2
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-042-2/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-012-0/+2
* soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik2019-01-101-35/+3
* soc/intel: Clean mess around UART_DEBUGNico Huber2019-01-091-1/+1
* Remove intel/skylake/bootblock/timestamp.incKyösti Mälkki2018-12-241-33/+0
* cpuid: Add helper function for cpuid(1) functionsSubrata Banik2018-12-131-7/+8
* soc/intel/skylake: Add PCH sku id's supported for KBLPraveen hodagatta pranesh2018-11-081-0/+3
* src: Replace MSR addresses with macrosElyes HAOUAS2018-10-111-2/+2
* soc/intel/common/block: Move common uart function to block/uartSubrata Banik2018-08-201-1/+2
* src: Fix typoElyes HAOUAS2018-08-101-2/+2
* src/soc/intel: Add AML IGD in platform reportingGaggery Tsai2018-08-061-0/+1
* src/soc: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS2018-07-091-1/+1
* soc/intel/common/block: Move p2sb common functions into block/p2sbSubrata Banik2018-06-281-21/+4
* src: Get rid of device_tElyes HAOUAS2018-06-142-6/+6
* bootblock: Allow more timestamps in bootblock_main_with_timestamp()Julius Werner2018-05-221-1/+1
* soc/intel: Add KBL-S MCH and some KBL PCH supportGaggery Tsai2018-03-261-0/+5
* soc/intel/skylake: Move PCR DMI programming into bootblockSubrata Banik2018-03-091-3/+30
* soc/intel/skylake: Add Kabylake PCH H device ID'sV Sowmya2018-02-071-0/+3
* soc/intel/skylake: Clean up the skylake PCH H device ID macrosV Sowmya2018-01-251-3/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-15 17:29:10 +0000