coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel: Use of common reset code block	Subrata Banik	2020-11-02	1	-16/+0
*	Revert "soc/intel: Refactor do_global_reset() function"	Furquan Shaikh	2020-09-22	1	-0/+27
*	soc/intel: Refactor do_global_reset() function	Subrata Banik	2020-09-21	1	-27/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-13/+2
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	1	-1/+0
*	soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_messa...	Sridhar Siricilla	2020-02-09	1	-1/+1
*	soc/intel/skylake: lockdown: lock global reset	Michael Niewöhner	2019-11-20	1	-1/+1
*	src: Use #include <timer.h> when appropriate	Elyes HAOUAS	2019-04-06	1	-1/+0
*	intel: Use CF9 reset (part 2)	Patrick Rudolph	2018-10-22	1	-2/+3
*	soc/intel/skylake: Add support in SKL for PMC common code	Shaunak Saha	2017-10-05	1	-8/+2
*	Consolidate reset API, add generic reset_prepare mechanism	Julius Werner	2017-06-13	1	-1/+1
*	soc/intel/skylake: Fix remaining issues detected by checkpatch	Lee Leahy	2017-03-17	1	-1/+1
*	soc/intel/skylake: Handle platform global reset	Subrata Banik	2016-10-16	1	-1/+34
*	soc/intel/skylake: Add FSP 2.0 support in romstage	Barnali Sarkar	2016-09-15	1	-1/+1
*	skylake: Add initial FSP2.0 support	Rizwan Qureshi	2016-08-31	1	-0/+32
*	soc/intel: Add Skylake SOC support	Lee Leahy	2015-07-16	1	-49/+0
*	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy	2015-07-16	1	-0/+49