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path: root/src/soc/intel/skylake
Commit message (Expand)AuthorAgeFilesLines
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-181-1/+0
* src: Match array format in function declarations and definitionsPatrick Georgi2021-05-131-1/+1
* soc/intel/skylake: Set proper defaults in chipset devicetreeFelix Singer2021-05-101-3/+3
* soc/intel/*: Update data types for variables holding PCH_DEVFN_* macrosTim Wawrzynczak2021-05-031-1/+1
* soc/intel/skylake: Remove useless help textsFelix Singer2021-05-021-6/+0
* soc/intel/skylake: Add Kconfig option for LGA1151v2Timofey Komarov2021-05-011-4/+26
* soc/intel/skylake: Add microcodes for Coffee Lake CPUsTimofey Komarov2021-05-012-0/+10
* soc/intel: Add Z370, H310C and B365 device IDsAngel Pons2021-04-281-0/+3
* soc/intel: Add Kaby Lake PCH-U base device IDAngel Pons2021-04-281-0/+1
* soc/intel/skylake: Shorten report_platform PCH-H namesAngel Pons2021-04-281-19/+19
* soc/intel: Rename 200-series PCH device IDsAngel Pons2021-04-281-8/+8
* soc/intel/skylake: Drop Lewisburg PCHs from report_platformAngel Pons2021-04-281-13/+0
* soc/intel/skylake: set MSR LT_LOCK_MEMORY only when using native MP initMichael Niewöhner2021-04-221-1/+6
* soc/intel/common,skl: set MSR LT_LOCK_MEMORY once, not per threadMichael Niewöhner2021-04-221-2/+1
* soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.cAngel Pons2021-04-213-26/+17
* soc/intel/skylake: Move pmc_set_disb() to pmutil.cAngel Pons2021-04-212-18/+14
* soc/intel/skylake: Move acpi_sci_irq() to acpi.cAngel Pons2021-04-215-31/+31
* soc/intel/skylake: Move `SataTestMode` to KconfigAngel Pons2021-04-203-4/+7
* intel: mma: Use new CBFS APIJulius Werner2021-04-141-8/+4
* soc/intel/skylake: Drop unnecessary `ignore_vtd` optionAngel Pons2021-04-085-13/+3
* soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPDAngel Pons2021-04-081-1/+1
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-271-0/+7
* soc/intel: Drop unused `GPIO_NUM_GROUPS` macroAngel Pons2021-03-202-2/+0
* soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner2021-03-121-33/+6
* soc/intel: Guard macro parameters in pm.hAngel Pons2021-03-031-2/+2
* soc/intel: Factor out common smmrelocate.cAngel Pons2021-03-033-251/+1
* soc/intel/skylake: Always print ME FW SKUBenjamin Doron2021-03-031-12/+12
* soc/intel/skylake: Enable compression on FSP-SBenjamin Doron2021-03-031-0/+1
* soc/intel: Backport SMRR locking supportAngel Pons2021-03-031-0/+17
* soc/intel/skylake: Move `gspi_early_bar_init()` callAngel Pons2021-03-012-2/+3
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-014-12/+2
* soc/intel/{skl,cnl}: Do not chain-include systemagent.hAngel Pons2021-03-012-3/+1
* skylake,fsp1_1: Delete dead `report_memory_config()` functionAngel Pons2021-03-012-42/+0
* soc/intel/skylake: Extract fsp_params.c out of romstage.cAngel Pons2021-03-013-187/+192
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-014-14/+3
* soc/intel/{skl,icl}: Move tco_configure() to bootblockAngel Pons2021-03-012-4/+4
* soc/intel/skylake: Drop unused function prototypesAngel Pons2021-03-012-2/+1
* soc/intel: Factor out common smbus.hAngel Pons2021-03-011-20/+1
* soc/intel/skylake: Correct SMBUS_SLAVE_ADDR definitionAngel Pons2021-03-011-2/+6
* soc/intel: Factor out common gpe.hAngel Pons2021-03-011-115/+1
* soc/intel/skylake: Move soc_acpi_name()Angel Pons2021-03-012-109/+111
* soc/intel: Factor out identical acpigen GPIO helpersAngel Pons2021-03-012-37/+1
* soc/intel/skylake: Clean up SD GPIO handlingAngel Pons2021-03-012-20/+13
* soc/intel/skylake: Remove unused macro in cpu.hAngel Pons2021-03-011-3/+0
* soc/intel: Include gfx.asl from northbridgeAngel Pons2021-03-012-3/+3
* soc/intel/{skl,cnl}: Uniformize romstage.h whitespaceAngel Pons2021-02-251-4/+5
* soc/intel/*/smmrelocate.c: Sync includesAngel Pons2021-02-241-9/+9
* soc/intel/{skl,cnl}: Move smm_lock() to cpu.cAngel Pons2021-02-242-13/+12
* soc/intel/*/pmutil.c: Align cosmetics across platformsAngel Pons2021-02-241-4/+2
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