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path: root/src/soc/intel/skylake
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* soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik2020-12-091-2/+1
* soc/intel/skylake: Shorten SATA mode enum value namesFelix Singer2020-12-081-5/+2
* soc/intel/skylake: Restore alphabetical order of Kconfig selectsFelix Singer2020-12-081-4/+4
* soc/intel/skl: set PEG port state to autoMichael Niewöhner2020-12-071-0/+3
* soc/intel/{skl,cnl}: add NMI_{EN,STS} registersMichael Niewöhner2020-12-042-0/+10
* soc/intel/common/block/gpio: add code for NMI enablingMichael Niewöhner2020-12-041-0/+3
* soc/intel/skylake: Add chipset devicetreeFelix Singer2020-12-032-0/+70
* src: Remove redundant use of ACPI offset(0)Elyes HAOUAS2020-12-032-2/+0
* soc/intel/skylake: Fix compilation under x86_64Patrick Rudolph2020-12-022-3/+3
* soc/intel/skylake: Map VBIOS IDsPaul Menzel2020-12-021-0/+20
* soc/intel/skylake: Fix commentFelix Singer2020-11-301-1/+1
* soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh2020-11-291-1/+6
* soc/intel/skl: correct OC pin skip value for disabled usb portsMichael Niewöhner2020-11-281-5/+6
* soc/intel/skylake: Support NHLT 1ch DMICBenjamin Doron2020-11-243-0/+47
* soc/intel/skylake: Use correct NHLT_PDM_DEV definitionBenjamin Doron2020-11-241-2/+2
* soc/intel/block/pmc: Only include the PCI driver when it is not hiddenArthur Heymans2020-11-221-0/+1
* soc/intel/{skl,cnl}: replace PM ACPI timer dt option by KconfigMichael Niewöhner2020-11-133-2/+3
* soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disablingMichael Niewöhner2020-11-132-11/+0
* soc/intel/skylake: Enable PCH thermal depending on devicetreeBenjamin Doron2020-11-091-0/+2
* soc/intel/skl,acpi/acpigen: convert global CPPC package to local oneMichael Niewöhner2020-11-041-8/+16
* soc/intel: Use of common reset code blockSubrata Banik2020-11-022-16/+2
* soc/intel: deduplicate ACPI timer emulationMichael Niewöhner2020-10-281-24/+0
* mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner2020-10-261-2/+1
* soc/intel/skl: replace conditional on dt option reading CPUID for CPPCMichael Niewöhner2020-10-261-2/+4
* soc/intel: drop unneeded ISST configuration codeMichael Niewöhner2020-10-261-28/+0
* src: Include <arch/io.h> when appropriateElyes HAOUAS2020-10-261-1/+0
* {cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner2020-10-242-43/+0
* {cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner2020-10-211-21/+1
* soc/intel,mb/*: get rid of legacy pad macrosMichael Niewöhner2020-10-211-1/+0
* soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner2020-10-213-8/+10
* soc/intel/common: add Kconfig for PM Timer emulation supportMichael Niewöhner2020-10-211-0/+1
* soc/intel/*: drop useless XTAL shutdown qualification codeMichael Niewöhner2020-10-191-4/+0
* soc/intel/skylake: Do not let FSP set the subsystem IDsBenjamin Doron2020-10-191-10/+5
* cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner2020-10-171-1/+0
* soc/intel/skylake: Rename PcieRpAspm devicetree configBenjamin Doron2020-10-162-3/+3
* soc/intel/skylake: Configure L1 substates for PCH root portsBenjamin Doron2020-10-152-0/+10
* soc/intel/skylake/cpu.c: Fix comment coding styleAngel Pons2020-10-141-4/+4
* soc/intel: Configure PAVP at compile-timeBenjamin Doron2020-10-121-0/+2
* soc/intel/common/block/acpi: Factor out common platform.aslSubrata Banik2020-10-051-20/+0
* soc/intel/{cnl,icl,skl}: Convert 'platform.asl' to ASL 2.0 syntaxSubrata Banik2020-10-051-1/+1
* soc/intel/skylake: Align platform.asl with CNLSubrata Banik2020-10-051-28/+2
* soc/intel/common/block/acpi: Factor out common smbus.aslSubrata Banik2020-10-052-9/+1
* soc/intel: Make use of PMC low power program from common blockSubrata Banik2020-10-033-14/+7
* soc/intel: Move pch_misc_init() to common codeSubrata Banik2020-10-031-4/+1
* soc/intel: Move soc_pch_pirq_init() to common codeSubrata Banik2020-10-032-69/+1
* soc/intel: Move pch_enable_ioapic() to common codeSubrata Banik2020-10-031-24/+1
* drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen2020-10-021-1/+0
* soc/intel/skylake: Move PMC MMIO offset macro into pmc.hSubrata Banik2020-09-302-2/+1
* soc/intel/skylake: Align PMC offset 0x31C name with CNLSubrata Banik2020-09-302-3/+3
* soc/intel/skylake: Align soc_pch_pirq_init() with CNLSubrata Banik2020-09-301-4/+4
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