index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
tigerlake
/
bootblock
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/common: Update Jasper Lake Device IDs
Meera Ravindranath
2020-02-25
1
-4
/
+5
*
soc/tigerlake: Add Device id for Tiger Lake Dual Core
Srinidhi N Kaushik
2020-02-17
1
-0
/
+1
*
soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774
Wim Vervoorn
2020-02-17
1
-2
/
+2
*
soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set
Wim Vervoorn
2020-02-17
1
-0
/
+5
*
soc/intel/tigerlake: Update PMC Register Base and platform check for JSP
Usha P
2020-02-15
1
-1
/
+1
*
soc/intel/common: Add Elkhartlake Device IDs
Tan, Lean Sheng
2020-01-22
1
-0
/
+13
*
soc/intel/tigerlake: Fix PMC config
Ravi Sarawadi
2020-01-08
1
-1
/
+1
*
soc/intel/tigerlake: Add required header files in pch.c
Aamir Bohra
2019-12-19
1
-0
/
+3
*
soc/intel/tigerlake: Pick correct pmc base reg from pch type
Maulik V Vaghela
2019-12-16
1
-9
/
+25
*
soc/intel/common: Add Jasperlake Device IDs
rkanabar
2019-12-10
1
-0
/
+4
*
soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()
Subrata Banik
2019-11-15
2
-2
/
+2
*
soc/intel/tigerlake: Include few more Tigerlake device IDs
Subrata Banik
2019-11-14
1
-3
/
+63
*
soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock
Subrata Banik
2019-11-09
4
-0
/
+420