| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/intel/tigerlake: Add PCH-H GPIO definitions | Jeremy Soller | 2021-08-24 | 1 | -2/+5 |
| * | soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h | Subrata Banik | 2021-03-27 | 1 | -0/+6 |
| * | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS | 2020-09-21 | 1 | -1/+0 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel | Shaunak Saha | 2020-05-06 | 1 | -5/+2 |
| * | soc/intel/tigerlake: Use SPDX for GPL-2.0-only files | Angel Pons | 2020-04-06 | 1 | -13/+2 |
| * | soc/intel/tigerlake: Remove Jasper Lake SoC references | Aamir Bohra | 2020-04-01 | 1 | -16/+5 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | soc/intel/tigerlake: Add Jasper lake GPIO support | Ronak Kanabar | 2020-03-03 | 1 | -5/+17 |
| * | soc/intel/tigerlake: Fix GPIO communities | Shaunak Saha | 2020-01-25 | 1 | -2/+5 |
| * | soc/intel/tigerlake: Do initial SoC commit till ramstage | Subrata Banik | 2019-11-09 | 1 | -0/+24 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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